Mustafa Tosun
mustafatosun90
I am a digital design/verification engineer. I have 2 years of full-time industry
experience. In total, I have 4.5 years of experience in RTL design, Electronic Design
Automation and Verification using VHDL/Verilog, Perl, Tcl and Linux. I was the #1
graduate of Bahcesehir University in Mechatronics Engineering in 2013
