I am a software developer, trying to learn about hardware design
Developer of open source EDA tools on Open Circuit Design
I've been worked as an Electrical Engineer for more than 20 years. I'd like to bring Artificial Intelligence to the EE design so that it can be "Self-driving".
Experienced Analog Design Engineer with strong background in HV CMOS ASICs.
Interested in Design, Verification, and Hand-off of Analog IPs. Worked on the definition, modeling, design, verification of DC-DC converters, Chargers, Ideal-Diodes, LDOs, Regulators, Bandgap references, Current limiting and sensing architectures. Excited for challenges in Analog Design, Layout and Post-silicon verification.
Passionate about engineering and electronics. Love teaching and mentoring. Highly experience in analogue and RF electronics and enjoy managing projects.
An experienced mixed-signal IC design engineer / design manager with over 25 years experience. Has design and led the design of multiple mixed-signal ICs through to tapeout and silicon verification. Also experienced with the delivery of IP blocks. Worked across multiple market sectors.
Electrical engineer with PhD in micro-electronics, and more than 23 years experience in the automotive industry. Specialized in the development of CAD tools to support mixed-signal and smart-power IC design. Founder of SYDELITY b.v. a start-up company offering services and products accellerating system-level simulations.
30+ years in IC design, completed several NOR/NAND flash projects, and running in production.
RF/Analog IC design and SOC
Chip Design CAD Expert
I am interested in new things. I've designed chips from definition to polygons, mostly in the pursuit of new capabilities.
Final year student of Electrical Engineering at UET Lahore. Area of expertise is Digital Design, Computer Architecture and SOCs.
electronic system designer / software and hardware engineer, embeded system expert, signal expert, proccess designer, researcher, Developer of complexity and reversal wantings. Reverse engineer. i addopt my whole life to this science. thank you for presentings of quantum, psych
Provides mixed-signal CMOS training to academia using open-source tools and also solution for the consumer and automotive industry.
RISC-V Enthusiast GSoC 2020 @ FOSSi Foundation RA @ CAD Lab, IISc Bengaluru, India EE Senior @ NITK Mangalore, India
President and CEO
IC designer with more than 25 years post Ph.D. experience. Specialising in RF, RFIC, analog and mixed-signal. Wide experience in Architecture, system and circuit design. RF front-end module design for cellular with CMOS PA. Over 40 patents issued.
I am an analog design engineer with over 10 years of experience. Most of designs lie in the field of power management (DC/DC converters), frequency synthesis (phase-locked loops), wireless power and data transfer (NFC front-ends as well as medical implants).
I have over thirty years of experience in the semiconductor industry, having worked in fab, EDA and design engineering. have built and led large, geographically distributed teams at a senior manager level. I am passionate about developing talent and skills, particularly in young people from socio-economically underprivileged backgrounds.
VLSI DOMAIN SKILLS --------------------------- • Digital Electronics • HDL: Verilog • HVL: System Verilog • TB Methodology: UVM • Protocols: APB, UART, I2C, SPI • EDA Tools: Modelsim, Quartus Prime, Questasim. VLSI RTL SKILLS ---------------------- • Digital Skills : Combinational and Sequential circuits • FSM • Memories • Verilog : Data types • Operators • BA and NBA • Delays in Verilog • Begin-end and fork-join Blocks • System tasks and Function • Compiler directive • FSM Coding. VLSI VERIFICATION SKILLS ------------------------------------ • System Verilog HVL: Data Types • Memories • Interface • OOPS • Constraint Randomization • Threads • Functional coverage • CRCDV • SV Testbench (Hands on SV Testbench) • Universal Verification Methodology: UVM Objects and Components • UVM Factory • UVM Phases • UVM Configuration • TLM • Virtual Sequence and Sequencer • UVM Testbench (Hands on UVM Testbench).
Berna Örs received the Electronics & Communication Engineering degree and the MSc degree in 1995 and 1998, respectively, both from the Istanbul Technical University (ITU), Turkey. She received the Electrical Engineering degree in applied sciences from the Katholieke Universiteit Leuven, Belgium, in 2005. Currently, she is a Professor at ITU. Her main research interests include cryptography, embedded systems, and side-channel attacks.
Since 2001 I have worked for a small IC Layout design firm located in Wilsonville, Oregon called Coast-to-Coast Layout Design Inc. We provide full-custom mask design services to big semiconductor partners, both digital and analog/mixed-signal. I began my career as a part-time Linux systems administrator, and was taught mask design by my mentor and boss, then over the past couple decades I moved up the ranks to my current GM position where I am responsible for most day-to-day operations and management of multiple mask design teams who are very highly valued by our customers that rely on our services to meet tough tapeout schedule and quality requirements. I'm here because I'm planning to use open-source EDA tools to help train new mask designers to help grow my company.
