Víctor Asanza, Ph.D. (EL Oro - Ecuador, 1986). Researcher in fields like Digital Systems Design based on FPGA, Open-Source Processor, Open-Source Hardware, Edge Computing, Artificial Intelligence and Human-Machine Interaction with a major research interest in Brain-Computer Interface. He was graduated as Electronic and Telecommunications Engineering on 2010 (ESPOL, Ecuador). He was graduated as Master in Automation and Industrial Control on 2013 and was graduated as Ph.D. in Applied Computer Science on 2022 (ESPOL, Ecuador). Currently, he collaborates as a Senior Researcher since June 6th, 2019, in the Smart Data Analysis Systems Group (SDAS GROUP). He performs research activities mainly within the framework of the research programs on intelligent embedded systems, open-source RISC-V processor, open-source hardware, FPGA, and Human-Machine Interaction.
Chip Physical Design CAD Expert with 4nm Experience. Excels at unusual assignments and large scripting/programming projects. Strong debug skills. Strong Python skills. Available for full time, part time, tutoring, mentoring, consulting. ** https://www.linkedin.com/in/petercolyer ** Chip Physical Design and CAD Flow Development; Prior Roles in Reliability, Test, and ASIC Development; Software Development. • Digital Physical Implementation; • CAD Flow Script Development; • Design Rule Manual Interpretation/Application; • BS Physics Siena College, Magna Cum Laude; • BS Electrical and Computer Engineering Clarkson University, with Great Distinction; • MS Electrical Engineering Syracuse University. Based in California USA; Based in USA