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Rishabh Verma

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Looking for an internship opportunity in VLSI or the semiconductor industry. Hey, Welcome to my page I'm Rishabh Verma, a pre-final ECE undergrad, who has a keen interest in the VLSI domain. I love to design and simulate circuits. Till now I have participated in two circuit design hackathons. One of them was "Mixed-signal Circuit Design and Simulation Marathon Using eSim" organized by FOSSEE Team IIT Bombay, in which my design was ranked under the "Outstanding" category with a cash prize of INR 10,000. I have hands-on experience with the simulation tools like Synopsys Custom Compiler, eSim, Vivado, Pspice, and LTspice. I have also done layout designing and parasitic extraction of some basic logic functions using the ELECTRIC VLSI system design tool. Done DRC and LVS. I'm also familiar with the FPGA flow. In my 3rd year, I have done the implementation of a Robotic Arm controller using the FPGA. Verilog HDL was used to code the algorithm. Currently, I'm working on the " AQI estimation " using Image processing on FPGA. You can check my projects on my Github, the link is provided in my resume or in the website section of my profile. Feel free! to reach out to me if you are doing some cool stuff on FPGA or something related to VLSI and Circuit design.

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