MS Research scholar at Indian Institute of Technology, Indore, India
Looking for an internship opportunity in VLSI or the semiconductor industry. Hey, Welcome to my page I'm Rishabh Verma, a pre-final ECE undergrad, who has a keen interest in the VLSI domain. I love to design and simulate circuits. Till now I have participated in two circuit design hackathons. One of them was "Mixed-signal Circuit Design and Simulation Marathon Using eSim" organized by FOSSEE Team IIT Bombay, in which my design was ranked under the "Outstanding" category with a cash prize of INR 10,000. I have hands-on experience with the simulation tools like Synopsys Custom Compiler, eSim, Vivado, Pspice, and LTspice. I have also done layout designing and parasitic extraction of some basic logic functions using the ELECTRIC VLSI system design tool. Done DRC and LVS. I'm also familiar with the FPGA flow. In my 3rd year, I have done the implementation of a Robotic Arm controller using the FPGA. Verilog HDL was used to code the algorithm. Currently, I'm working on the " AQI estimation " using Image processing on FPGA. You can check my projects on my Github, the link is provided in my resume or in the website section of my profile. Feel free! to reach out to me if you are doing some cool stuff on FPGA or something related to VLSI and Circuit design.
Zhiyang Ong is a globetrotting, venturesome cultural chameleon tackling challenges related to U.N. Sustainable Development Goals, using a skill set that spans electrical engineering and computer science. He is a Ph.D. student at Texas A&M University's electrical & computer engineering department. He is currently working on noise-based logic and embedded deep learning, and had worked on problems in electronic design automation, VLSI formal verification, satisfiability modulo theories, network science (or complex systems), evolutionary computation, network optimization, and multi-objective optimization. He has also designed multiple VLSI circuits and systems, from SRAMs and processors to a Viterbi decoder and a tree adder. In his free time, he was recently working on solving the Quadratic Travelling Salesman Problem (QTSP) with his research collaborators, using an adiabatic quantum computer from D-Wave Systems.
As a PhD candidate in Electrical and Computer Engineering at Rowan University, I am passionate about designing domain-specific customized hardware accelerators using Hardware Description Languages. I am currently a Graduate Research and Teaching Fellow, working on projects related to computer hardware architecture, digital design, and VLSI design. I have expertise in VHDL, VERILOG, and Scala, and experience with testing, debugging, simulating, and waveform analysis tools. I also have a strong background in computer architecture, SOC design, and reversible computing, and knowledge of C/C++ programming languages. Additionally, I have secured multiple grants from the National Science Foundation for conducting customer discovery interviews in the domain of scientific computing. I have also published several papers in international journals and received the Young Researcher Award in 2020. I am a team player, a leader, a mentor, and a public speaker, with skills in interviewing, collaborating, and empowering others.
