Jan Gray is the President of Gray Research LLC, Bellevue, WA, USA. Jan is a software architect and computer architect. Formerly a Partner Software Architect at Microsoft, Jan's developer tools and platforms products include Alice Pascal, Microsoft C/C++ 7.0, Visual C++ 1.0-4.0, Transaction Server 1.0, 2.0, COM+ Services, Common Language Runtime / Microsoft .NET performance engineering, and the MS Parallel Computing Platform (Visual Studio 2010). Blame Jan for .PDB files. Jan is also an expert in computing with FPGAs. He designed the first 32b FPGA RISC SOC (1995), first FPGA RISC multiprocessor (1999), first kilocore RISC-V, and first kilocore RV64I with HBM. Jan has over 60 patents granted in US, Europe, and Asia.
Experienced Senior Technology Manager with a demonstrated history of working in the semiconductor and Hi-Tech industry, High-Performance Computing (HPC) information technology, and services industry. Skilled in IT Infrastructure Management, sales enablement, semiconductor design development, and Electronic Design Automation software development. Strong business development professional from Harvard Business Analytics Program.
As an experienced Electronic Engineer with a solid foundation in FPGA design, embedded systems, and IoT, I specialize in high-level hardware programming and real-time signal processing. With expertise in RTL, RISC-V, Verilog, SystemVerilog, and VHDL, I bring a robust understanding of digital design to my work. My professional background includes over a decade in the PCBA assembly industry, where I programmed and configured SPI and Chip Mounter machines, managed production processes, and handled CAD and Gerber files for precision assembly. Additionally, I am well-versed in designing and testing complex circuits using tools like Proteus, Fritzing, and Altium, with a particular interest in the emerging role of AI in electronics. As a career coordinator, former educator in electronics, and an active researcher, I blend practical industry experience with a passion for fostering innovation and teaching in the electronics field. My recent projects involve integrating IoT with embedded solutions, exploring the intersection of FPGA technology with real-time applications, and continually expanding my knowledge in artificial intelligence.
As a PhD candidate in Electrical and Computer Engineering at Rowan University, I am passionate about designing domain-specific customized hardware accelerators using Hardware Description Languages. I am currently a Graduate Research and Teaching Fellow, working on projects related to computer hardware architecture, digital design, and VLSI design. I have expertise in VHDL, VERILOG, and Scala, and experience with testing, debugging, simulating, and waveform analysis tools. I also have a strong background in computer architecture, SOC design, and reversible computing, and knowledge of C/C++ programming languages. Additionally, I have secured multiple grants from the National Science Foundation for conducting customer discovery interviews in the domain of scientific computing. I have also published several papers in international journals and received the Young Researcher Award in 2020. I am a team player, a leader, a mentor, and a public speaker, with skills in interviewing, collaborating, and empowering others.