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"profiles" search for "skills": Cadence innovus

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Number of Results: 9

Wajeh

I have been delving into the IC design industry for the last 3 years. I started with circuit designing on Virtuoso and am now working with the APR flow for the last 1.5 year

Skills

Cadence innovus Cadence Virtuoso OpenLane

Area of Expertise

Digital: Placement and Routing

wajeh ul hasan

I have been delving into the IC design industry for the last 3 years. I started with circuit designing on Virtuoso and am now working with the APR flow for the last 1 year

Skills

cadence genus cadence innovus Cadence Virtuoso

Area of Expertise

Digital: Placement and Routing

Ethan Gao

2nd Year EECS Undergraduate student @ UC Berkeley

Skills

C/C++ Verilog Cadence Innovus

Area of Expertise

Academic: Student

i212437 Abdul Moiz Sheikh

Skills

C/C++ Cadence Virtuoso Verilog Cadence Innovus

Area of Expertise

Academic: Student

I have done electronic engineering from University of Engineering and Technology Peshawar in 2021, currently, i am doing MS in Electrical Engineering (Specialization in IC Design) from National University of Computer and Emerging Science(FAST-NUCES).

Skills

Cadence Genus Cadence Innovus Cadence Virtuoso Verilog

Area of Expertise

Analog: Layout Digital Synthesis Digital: Placement and Routing Digital: RTL

Jerry Yin

Skills

Cadence Virtuoso Calibre Magic CAD Verilog Cadence Innovus Synopsys Design Complier Synopsys ICC2 Synopsys Prime Time

Area of Expertise

Academic: Student VLSI Physical Design

karunakar reddy kesamreddy

I am a professional in the field of Chip Design, Primary working on Synthesis, Physical Design, Static Timing Analysis and Physical Verification

Skills

Cadence Virtuoso Cadence Innovus Cadence Genus Synopsys Prime Time Synopsys IC Compiler 2 Synopsys Fusion Compiler Synopsys Design Compiler Tweaker Synopsys IC Validator Seimens Calibre

Area of Expertise

Analog: Design Digital: Synthesis Physical Design Physical Verification Static Timing Analysis

Kunlin Han

Skills

Cadence Virtuoso Calibre System Verilog Verilog VHDL Cadence Innovus StarRC PrimeTime

Area of Expertise

Academic: Student

Dhanunjaya Achari Kammari

A dedicated Physical Design Engineer aspiring to craft silicon for real-world applications.

Skills

Cadence Genus Cadence Innovus Cadence Virtuoso Calibre Python Tcl/Tk Verilog

Area of Expertise

Physical Design Scripting Synthesis