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"profiles" search for "interests": Rtl design and verification
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Number of Results: 4

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Ahsan Ali

Passionate Electrical Engineer with interest in computer architecture and SoCs.

Skills

C/C++ Matlab Python System Verilog Verilog

Area of Expertise

Academic: Student Circuits: Microcontrollers Digital: RTL Digital: Synthesis Digital: Verification
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RECEP GÜNAY

Received B.S. degree from Electrical and Electronics Engineering in Middle East Technical University, Turkey, in 2019. Currently, pursuing M.S. degree from Electronics Engineering in Bogazici University, Turkey. Research interests are computer architecture, hardware security and secure memory architecture

Skills

C/C++ Cadence Virtuoso Magic CAD System Verilog Verilog

Area of Expertise

Academic: Student Circuits: Memory Circuits: Microcontrollers Digital: RTL Digital: Synthesis Digital: Verification Miscellaneous: Cryptography System: FPGA Programming
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Geethanand N

Ex intel professional with over 5 years of experience in front end Vlsi

Skills

Perl System Verilog Tcl/Tk Verilog

Area of Expertise

CAD: Scripting Digital: RTL Digital: Verification SoC: Verification
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Pruthvi raj Venkatesha

Skills

C/C++ Cadence Virtuoso System Verilog Verilog

Area of Expertise

Academic: Student