Analog full custom design experience of Low power VOltage regulators, Bandgap reference, calibration circuits and common mode receiver. worked on SERDES IP (up to 12Gbps) compliant with USB 3.1 and SATA protocols. AS ESD ENgineer for SERDES IP Improved existing ESD network simulation strategy and ESD network for robust ESD performance reliability and automated existing current density flow for ESD for better efficiency. Technology Nodes: 14nm(FINFet), 28nm(FDSOI) 28 nm,40nm,90nm,180nm (Bulk)
I'm a double-degree PhD candidate at University of São Paulo and Communauté Université Grenoble-Alpes with experience in analog/RF design and layouting at integrated technologies and interposers, with experience in slow-wave devices.
I am designed mixed signal ICs for Music, Audio, IoT and sensor applications.
M. Pardo (Senior Member, IEEE) received the B.S. degree in electronics engineering from Universidad del Norte, Barranquilla, Colombia, in 2002, and the M.Sc. and Ph.D. degrees in electrical engineering from the Georgia Institute of Technology, Atlanta, GA, USA, in 2007 and 2012, respectively. He is currently an Electronics and Electrical Engineering Department Graduate Programs Coordinator with Universidad del Norte and leads the electronic analog design area. His research interests include the areas of oscillators, energy harvesters, and renewable energy systems.
A PhD student working in WEST (Wireless Environmental Sensor Technology) Lab with a focus on Analog IC design.
My research interests include systematic circuit synthesis techniques, modeling and simulation of linear and nonlinear circuits and systems, design and applications of fractional order chaotic oscillators, multi-objective optimization, evolutionary algorithms, and analog and mixed-signal design automation tools.