I am Physical Designe Engineer -1 at Signoff Semiconductors
I am Pratika Tripathi. I am in my final year of Btech. I am very interested in physical designing of IC. I had even taken 3 courses of kunal ghosh sir on physical design, stay, and cts. I am doing my final year project in physical design.
My name is Syed Muhammad Saad Ahmed Shah, and I am an ambitious student pursuing a degree in Electrical Engineering at NUST (National University of Sciences and Technology), specializing in chip designing and digital system design. I am writing to express my sincere interest in contributing my skills and passion for chip designing to your esteemed company. Academic Background: During my academic journey, I have excelled in various courses that form the foundation of integrated circuit design. My coursework includes advanced topics in digital logic design, microelectronics, VLSI, and FPGA programming. I have gained hands-on experience in Verilog programming and have successfully implemented FPGA-based projects, including dynamic positioning of wind power platforms and ball and beam control systems. Passion for Chip Designing: My interest in chip designing stems from its potential to revolutionize technology and create innovative solutions that positively impact society. The idea of crafting complex electronic systems from scratch and optimizing their performance intrigues me. I am eager to explore the world of ASIC and FPGA design, as I believe it aligns perfectly with my passion for creating cutting-edge semiconductor devices. Skills and Attributes: Apart from my technical skills, I possess strong analytical and problem-solving abilities. My adaptability and eagerness to learn allow me to tackle new challenges with determination. I value teamwork and collaboration, and I thrive in environments where ideas are shared and cultivated collectively. Future Goals: As I move forward in my academic journey, my goal is to be at the forefront of chip designing and contribute to the development of advanced technologies. I see myself as a part of a dynamic team, working on groundbreaking projects that shape the future of the semiconductor industry.
I am a results-driven Electrical Engineer with a strong foundation in digital design, RTL to GDSII flow, and system-level architecture, complemented by hands-on experience with FPGA and ASIC environments. With expertise in Verilog, SystemVerilog, and VHDL, I have designed and implemented advanced digital systems, including high-efficiency MLP architectures and custom ASIC designs for optimized performance and power efficiency
I'm a BTech Electronics and Instrumentation graduate and an electronics enthusiast who was inspired by the open-source silicon technology and it's accomplishment and aim to build a career for myself in VLSI specifically as an ASIC Physical Design Engineer.
As a VLSI enthusiast, I completed a 6-month internship as a NAND product engineer at Micron Technology where my work comprises of post-silicon validation, data analysis using JMP, and testing NAND components under varying PVT conditions in DDR3 and LPDDR4. I'm passionate about CMOS and have experience simulating NAND output drivers through HSPICE simulations in collaboration with the design team. Additionally, I have proficiency in System Verilog, RTL design, and a solid grasp of digital IC, analog IC, and physical design. I hold a master's degree in Microelectronics from BITS Hyderabad and a bachelor's degree in ECE from Gayatri Vidya Parishad. I achieved a GATE ECE score of 571 with an All India Rank (AIR) of 1404 in 2023. devadeepreddi20@gmail.com
