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"profiles" search for "interests": Digital VLSI
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Number of Results: 12

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Shibmalya Sen

M.Tech in VLSI and Microelectronics.

Skills

C/C++ Cadence Virtuoso Matlab Python Verilog

Area of Expertise

Academic: Student
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Matthew Ernest

VLSI circuit design engineer with significant experience in microprocessor design in semiconductor processes from 65nm to 10nm. Provided register file designs and design training for Intel Big Core and SOC projects. Helped create semi-automated array layout methodology. Established cross-organizational methodology for variation analysis in register files. Converged memory IP handling across multiple organizations.

Skills

Analog/Digital Circuit Design Circuit Design Perl Python VLSI/ASIC and SoC Development

Area of Expertise

ASIC Design/Verification Design Automation Digital-BE Digital-DV
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Vishwajeet S B

I'm VLSI Design Engineer aspirant and like to work on design challenges in VLSI domain. I like to keep updated of cutting-edge technology in my field of interest.

Skills

Analog CMOS Circuit Circuit Design Matlab Python Verilog

Area of Expertise

Digital-RTL
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Hossam Hassan

Skills

C/C++ Cadence Encounter Cadence Virtuoso Matlab Python System Verilog System-C Verilog

Area of Expertise

Academic: Research Analog: Design Analog: Layout Analog: Modeling Analog: Simulation Analog: Verification Circuits: Microcontrollers Circuits: Sensors Circuits: Signal Processing Digital: RTL Digital: Synthesis Digital: Verification SoC: Verification System: FPGA Programming System: PCB
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Bharathi M

working as Assistant Professor in Sree Vidyanikethan engineering college, Tirupati.

Skills

Eldo Verilog VHDL

Area of Expertise

Academic: Teaching Circuits: Signal Processing Digital: RTL Digital: Synthesis Digital: Verification System: Fabrication Process System: FPGA Programming
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Vinay Kushwaha

Skills

ngspice ltspice

Area of Expertise

Academic: Research
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Ashesh Pangma

I am a MSc. Electronic engineering graduate interested in VLSI design.

Skills

Verilog RTL

Area of Expertise

Analog: Design Analog: Layout Digital: RTL
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S Skandha Deepsita

Chip-design enthusiast, passionate to innovate. PhD Scholar @IIITDMKancheepuram

Skills

Cadence Encounter Cadence Virtuoso Magic CAD Matlab ngspice Verilog VHDL

Area of Expertise

Academic: Research Academic: Teaching Digital: RTL Digital: Synthesis
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Indranil Hatai

i am a vlsi enthusiast

Skills

Cadence Encounter Matlab System Verilog Verilog VHDL

Area of Expertise

Academic: Research Academic: Teaching Circuits: Signal Processing Digital: RTL Digital: Synthesis System: FPGA Programming
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Ms. Spoorthi S

Skills

Cadence Virtuoso

Area of Expertise

Academic: Student
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SAMRAT CHHABRA

Enthusiastic electronics engineer passionate about the digital VLSI domain.

Skills

C/C++ Matlab System Verilog Verilog VHDL

Area of Expertise

Digital: DFT Digital: RTL Digital: Synthesis Digital: Verification
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Payman Zarkesh-Ha

Skills

Tanner L-Edit

Area of Expertise

Academic: Teaching