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"profiles" search for "interests": Memory

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Number of Results: 23

Baker Mohammad

Experienced leader of industry and academia focusing on developing customized hardware accelerators for low power mobile, AI and IoT devices. Over 20-years hands-on experience in all aspects of SOC and processor design. Specialties: memory design (SRAM, regfile, CAM), VLSI design for best Power, Performance, and Area (PPA) design point. Power management and power conversion including dc/dc and ac/dc. Computer Architecture and Hardware accelerator using In-Memory-Computing and Emerging Technologies (RRAM)

Skills

Cadence Virtuoso Leadership Verilog

Area of Expertise

Academic: Teaching Analog: Design Circuits: Memory Circuits: Power Management Circuits: Signal Processing

Ganesh Prasad B K

I am an electronics engineer currently working as an intern in STMicroelectronics.

Skills

Cadence Virtuoso Calibre Eldo Matlab Python Spectre Tcl/Tk Verilog VHDL

Area of Expertise

Academic: Student Analog: Simulation

James Stine

Edward Joullian Endowed Chair in Engineering Oklahoma State University Department of Electrical and Computer Engineering VLSI Computer Architecture Research Group

Skills

C/C++ Cadence Encounter Cadence Virtuoso Calibre Magic CAD Matlab Netgen ngspice Octave Perl Python SKILL Spectre System Verilog Tcl/Tk Verilog VHDL

Area of Expertise

Academic: Research

병권 안

Skills

Cadence Virtuoso

Area of Expertise

Academic: Student

Pranav Mathews

Electrical Engineering PhD student at Georgia Tech

Skills

Magic CAD

Area of Expertise

Academic: Research Analog: Design Analog: Layout Miscellaneous: Neural Networks

Manish Kumar Mahato

Skills

C/C++ Cadence Encounter Cadence Virtuoso Matlab Python Software Developer System Verilog Verilog

Area of Expertise

Academic: Research Business: PCB Manufacture Circuits: Memory Circuits: Microcontrollers Digital: Placement and Routing Digital: RTL Digital: Synthesis Digital: Verification Miscellaneous: Neural Networks SoC: Floorplanning SoC: Verification System: FPGA Programming System: PCB System: Test Equipment

ADITYA SHARMA

Skills

Cadence Virtuoso

Area of Expertise

Academic: Student

Jafar Hussain

IC Designer

Skills

C/C++ Cadence Virtuoso Calibre Matlab Spectre System Verilog Verilog

Area of Expertise

Academic: Student Analog: Design Analog: Layout Analog: Modeling Analog: Simulation Analog: Verification SoC: Floorplanning System: Fabrication Process

Kaustav Guha

Skills

C/C++ Cadence Encounter Cadence Virtuoso Leadership Python System Verilog System-C Verilog VHDL

Area of Expertise

CAD: Scripting Digital: Placement and Routing Digital: RTL Digital: Synthesis Digital: Verification System: FPGA Programming FPGA

RECEP GÜNAY

Received B.S. degree from Electrical and Electronics Engineering in Middle East Technical University, Turkey, in 2019. Currently, pursuing M.S. degree from Electronics Engineering in Bogazici University, Turkey. Research interests are computer architecture, hardware security and secure memory architecture

Skills

C/C++ Cadence Virtuoso Magic CAD System Verilog Verilog

Area of Expertise

Academic: Student Circuits: Memory Circuits: Microcontrollers Digital: RTL Digital: Synthesis Digital: Verification Miscellaneous: Cryptography System: FPGA Programming

Belal Iqbal

I am Ph.D Scholar at IIITD , my research area is In memory computation.

Skills

Cadence Virtuoso Calibre Eldo ngspice Verilog

Area of Expertise

Academic: Research Circuits: Memory

Redwan

Skills

Cadence Virtuoso Calibre Python Spectre Tanner L-Edit Verilog

Area of Expertise

Analog: Layout Circuits: Memory

Rashmi Jha

I am a professor in the department of electrical and computer engineering at University of Cincinnati. My areas of expertise are: CMOS, Beyond-CMOS devices such as RRAM, FeFETs, gated-RRAM, TFTs, novel device design, fabrication, and testing, neuromorphic computing, and hardware security.

Skills

Cadence Virtuoso Matlab Python Verilog

Area of Expertise

Academic: Research Academic: Teaching CAD: Tool Development Circuits: Memory

Abdul Wajjid

Analog & Memory IC design Engineer

Skills

C/C++ Cadence Virtuoso Calibre Leadership Matlab Spectre Verilog

Area of Expertise

Academic: Research Analog: Design Analog: Modeling Analog: Simulation Circuits: Memory

Mariam Rakka

I am a PhD student in Electrical and Computer Engineering at the University of California, Irvine.

Skills

C/C++ Matlab Python Verilog VHDL hspice

Area of Expertise

Academic: Research Academic: Student Academic: Teaching Analog: Simulation

Artur Darbinyan

Skills

Cadence Encounter Cadence Virtuoso Calibre Hercules Leadership SPICE Opus Verilog

Area of Expertise

Analog: Layout Business: Management Circuits: Memory Digital: Placement and Routing Digital: Synthesis SoC: Floorplanning

Tseng BO-YU

Skills

C/C++ Matlab Octave Python System Verilog System-C Verilog

Area of Expertise

Academic: Student

Muhammed Ceylan Morgul

UVA HPLP

Skills

C/C++ Cadence Virtuoso Matlab Python Spectre Verilog VHDL

Area of Expertise

Academic: Research Academic: Student Circuits: Memory Circuits: Microcontrollers Digital: DFT Digital: Placement and Routing Digital: RTL Digital: Synthesis Digital: Verification Miscellaneous: Neural Networks SoC: Floorplanning System: Test Equipment

Manuel Muro

Known since I was 12 years old that I wanted to be an electrical engineer, by the time I was like 14 or 16 years I knew that I specifically wanted to design microprocessors. I officially became an electrical engineer by graduating with a B.S.E.E. along with a minor in Business from N.C. State University. With more than 30 years of industry experience, I look forward to bringing some of my own original ideas and visions into reality and I am very much tapped in the entrepreneurial spirit while also be an advocate for Open Source projects, both Software and hardware based, along with being a super advocate for the Agile movement for all engineering disciplines, i.e. beyond it just being a thing software folks do!

Skills

A-D/D-A AGILE AI AMBA ARM ASICs C/C++ Design Automation DSP FPGAs Full-Stack Dev JSON Memory(RRAM, SRAM, Flash & DRAM) Microprocessors MIPI-CSI MIPI-DSI MIPS ML PCIe Perl Python RF RISC-V SoCs Software Defined Radios UVM VLSI WISHBONE X86

Area of Expertise

Circuits: Memory Circuits: Microcontrollers

Qiuyuan Wang

Graduate student in MIT EECS trying to combine stochastic MTJ devices to silicon

Skills

C/C++ Cadence Virtuoso Matlab Python Spectre System Verilog Verilog Altium Designer

Area of Expertise

Academic: Research Academic: Student Analog: Design Analog: Layout Analog: Simulation CAD: Scripting Circuits: Communication Circuits: Memory Circuits: Microcontrollers Circuits: Power Management Digital: RTL Digital: Synthesis System: Fabrication Process System: FPGA Programming System: Packaging System: PCB System: Test Equipment System: Test Programming

Nigil Mohra

Skills

Cadence Virtuoso

Area of Expertise

Academic: Student

karunakar reddy kesamreddy

I am a professional in the field of Chip Design, Primary working on Synthesis, Physical Design, Static Timing Analysis and Physical Verification

Skills

Cadence Virtuoso Cadence Innovus Cadence Genus Synopsys Prime Time Synopsys IC Compiler 2 Synopsys Fusion Compiler Synopsys Design Compiler Tweaker Synopsys IC Validator Seimens Calibre

Area of Expertise

Analog: Design Digital: Synthesis Physical Design Physical Verification Static Timing Analysis