Experienced leader of industry and academia focusing on developing customized hardware accelerators for low power mobile, AI and IoT devices. Over 20-years hands-on experience in all aspects of SOC and processor design. Specialties: memory design (SRAM, regfile, CAM), VLSI design for best Power, Performance, and Area (PPA) design point. Power management and power conversion including dc/dc and ac/dc. Computer Architecture and Hardware accelerator using In-Memory-Computing and Emerging Technologies (RRAM)
I am an electronics engineer currently working as an intern in STMicroelectronics.
Edward Joullian Endowed Chair in Engineering Oklahoma State University Department of Electrical and Computer Engineering VLSI Computer Architecture Research Group
Received B.S. degree from Electrical and Electronics Engineering in Middle East Technical University, Turkey, in 2019. Currently, pursuing M.S. degree from Electronics Engineering in Bogazici University, Turkey. Research interests are computer architecture, hardware security and secure memory architecture
I am a professor in the department of electrical and computer engineering at University of Cincinnati. My areas of expertise are: CMOS, Beyond-CMOS devices such as RRAM, FeFETs, gated-RRAM, TFTs, novel device design, fabrication, and testing, neuromorphic computing, and hardware security.
Analog & Memory IC design Engineer
I am a PhD student in Electrical and Computer Engineering at the University of California, Irvine.
Known since I was 12 years old that I wanted to be an electrical engineer, by the time I was like 14 or 16 years I knew that I specifically wanted to design microprocessors. I officially became an electrical engineer by graduating with a B.S.E.E. along with a minor in Business from N.C. State University. With more than 30 years of industry experience, I look forward to bringing some of my own original ideas and visions into reality and I am very much tapped in the entrepreneurial spirit while also be an advocate for Open Source projects, both Software and hardware based, along with being a super advocate for the Agile movement for all engineering disciplines, i.e. beyond it just being a thing software folks do!
Graduate student in MIT EECS trying to combine stochastic MTJ devices to silicon
I am a professional in the field of Chip Design, Primary working on Synthesis, Physical Design, Static Timing Analysis and Physical Verification
I am a Professor at BITS Pilani. I teach courses on VLSI Design, Semiconductor device and process and Analog Design. My area of research includes neuromorphic computing, embedded memories and biosensors.
