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Number of Results: 10

Shahbaaz Lokhandwala

An independent and self-motivated fpga engineer with many product and service based project in semiconductor and cryptography market. More than three years of experience in the crypto mining market. Involved in product design/development, management.

Skills

C/C++ Verilog xilinx vivado

Area of Expertise

Digital: Placement and Routing Digital: RTL Digital: Synthesis Miscellaneous: Cryptography

Andre5

I am Electronic Engineer from Chile, I like DSP and radioastronomy applications an ordinary guy

Skills

C/C++ System Verilog Verilog Design Compiler Descartes Formality ICC ICC2 DFT Xilinx ISE design suite FPGA full flow programming

Area of Expertise

Circuits: Filters Circuits: Signal Processing Digital: Placement and Routing System: FPGA Programming System: Quality Assurance System: Test Programming

Ankit Agrawal

I am VLSI Design & Verification Engineer.

Skills

Aldec RivieraPro C/C++ Digital Electronics System Verilog UVM Verilog Xilinx ISE

Area of Expertise

Digital: RTL Digital: Verification SoC: Verification

Wouter van Verre

Electronics engineer in the UK

Skills

C/C++ Verilog VHDL Xilinx Vivado FPGA

Area of Expertise

Academic: Research

A Devipriya

Skills

Python System Verilog C programming Xilinx ISE Design Suite eSim EDA Tool Skywater 130nm

Area of Expertise

Digital Design Verilog coding

Zhiyang Ong

Zhiyang Ong is a globetrotting, venturesome cultural chameleon tackling challenges related to U.N. Sustainable Development Goals, using a skill set that spans electrical engineering and computer science. He is a Ph.D. student at Texas A&M University's electrical & computer engineering department. He is currently working on noise-based logic and embedded deep learning, and had worked on problems in electronic design automation, VLSI formal verification, satisfiability modulo theories, network science (or complex systems), evolutionary computation, network optimization, and multi-objective optimization. He has also designed multiple VLSI circuits and systems, from SRAMs and processors to a Viterbi decoder and a tree adder. In his free time, he was recently working on solving the Quadratic Travelling Salesman Problem (QTSP) with his research collaborators, using an adiabatic quantum computer from D-Wave Systems.

Skills

C/C++ Cadence Encounter Cadence NC-Verilog Cadence Virtuoso Electric CAD Electric VLSI Design System Matlab Mentor/Siemens EDA ModelSim ngspice Octave Perl Python Software Developer Synopsys Avanwaves Synopsys Cosmos Synopsys Design Compiler Synopsys HSPICE Synopsys NanoSim Synopsys PrimeTime System Verilog System-C Tcl/Tk Verilog VHDL Xilinx ISE

Area of Expertise

Academic: Research Academic: Student Analog: Design Analog: Modeling Analog: Simulation Analog: Verification CAD: Scripting CAD: Tool Development Circuits: Communication Circuits: Filters Circuits: Memory Circuits: Microcontrollers Circuits: Signal Processing design space exploration of VLSI system designs Digital: Placement and Routing Digital: RTL Digital: Synthesis Digital: Verification Miscellaneous: Neural Networks RTL code generation SoC: Floorplanning SoC: Verification System: Chip Editing System: FPGA Programming System: Test Programming VLSI layout design

Burhan Showkat

Skills

ADS C EDA Multisim Solidworks XILINX ISE Xilinx Vivado

Area of Expertise

Academic: Student

Preethi grace

Skills

VLSI Xilinx

Area of Expertise

Academic: Student

Devadeep Reddi

As a VLSI enthusiast, I completed a 6-month internship as a NAND product engineer at Micron Technology where my work comprises of post-silicon validation, data analysis using JMP, and testing NAND components under varying PVT conditions in DDR3 and LPDDR4. I'm passionate about CMOS and have experience simulating NAND output drivers through HSPICE simulations in collaboration with the design team. Additionally, I have proficiency in System Verilog, RTL design, and a solid grasp of digital IC, analog IC, and physical design. I hold a master's degree in Microelectronics from BITS Hyderabad and a bachelor's degree in ECE from Gayatri Vidya Parishad. I achieved a GATE ECE score of 571 with an All India Rank (AIR) of 1404 in 2023. devadeepreddi20@gmail.com

Skills

VLSI Design, Digital Electronics, STA, Analog Electronics, Physical Design, Verilog, System Verilog, C, Python, Perl, Linux, Vivado - Xilinx, Cadence Virtuoso, JMP, HSPICE, CLI

Area of Expertise

Analog: Design

Ramavenkateswaran Nagarajan

I am interested in reserach and projects on IC Design, Neuromorphic Computing and Digital Design

Skills

Cadence Virtuoso Xilinx Vivado RTL Coding Neuromorphic Computing

Area of Expertise

Academic: Research