Electronics Engineer student at Benemerita Universidad Autonoma de Puebla
I am a professional hardware engineer. I have experience in the development and design of radio equipment and IoT devices. I only have textbook-level knowledge about the contents of semiconductors, so I wanted to have the experience of actually developing them. This project is very interesting. thank you.
I received the B.S. degree in Industrial Electronics Engineering from the Universitat Politècnica de Catalunya, Spain, in 2007, and the M.S. degree in Micro- and Nanoelectronics Engineering in 2009 and the Ph.D. degree in Microelectronics and Electronic Systems in 2015 both from the Universitat Autònoma de Barcelona, Spain. From 2006 to 2008, I was with Investigation Total Ware, S.A., Spain, where I was engaged in analog and mixed-signal circuit design for highly reliable wireless telecommunication systems. From 2008 to 2015, I was with the Integrated Circuits and Systems design group at the Institut de Microelectrònica de Barcelona, CNM, CSIC, Spain, designing low-power high-precision mixed-signal ASICs for integrated smart sensors and IP blocks. From 2015 to 2016, I was with Broadcom Ltd., Barcelona, Spain, developing low-power CMOS IPs like low-temperature-drift oscillators, varible-temperature-coefficient current/voltage generators, temperature sensors, cross-domain level shifting and biasing circuits, touch-sensor transmitter drivers. I am co-author of 12 publications and participant in several research and industrial projects using a wide range of CMOS technology nodes. I am recipient of the 2007 Highest Grade Point Average in the Graduating Class Award, the 2014 Best Paper Award and the 2015 Student Best Paper Award Honorable Mention. My skills include: high-performance continuous-time/switched-capacitor circuits such as low-power high-resolution ADCs/DACs using Class-AB OpAmps; system high-level modeling (SciPy/Sage, Matlab); system electrical-level modeling (Verilog/-A/-AMS); EKV circuit-level modeling; full-custom IC design cycle (gEDA Tools/Cadence Virtuoso: from schematics to layout and verification); development of low-noise and low-distortion test equipment (including microcontrollers and FPGAs) and software (using C++, Tcl, VB, Python); and, experimental IC measures and parameter extraction.
Electrical engineer with over 7 years of experience in the semiconductor industry. Working experience in Analog IC Design, Silicon/FPGA Lab bring-up and testing, FPGA Prototyping/Emulation & ASIC/SoC Design,
Paulo Roberto B. de Carvalho is a Hardware and Digital IC Design Engineer with 6-years experience in microelectronic area in Digital IC Design, with specialization in RTL design optimization for area and power reduction, Verification and Physical Implementation flow. He has 10-years experience in Application Engineering, technical consultant and semiconductors manufacture processes. He received his bachelor degree in materials, processes and electronic components technology at Faculdade de Tecnologia de Sao Paulo (FATEC-SP) in 2006. In 2011, he joined the Brazillian Federal Government IC Brazil Program of the Ministry of Science, Technology and Innovation (MCTI), trained in Digital Systems Design area. He received his Master of Science degree in Electric Engineering with specialization in Microelectronic area on Integrated Systems Laboratory at Electrical Engineering Department of Polytechnic School of University of Sao Paulo in 2016.
35 years mixed signal SoC, ASIC, and FPGA design and management experience. Concertal provides rapid functional IP integration using proprietary System Design Automation technology that includes delivery of RTOS capable fabric that supports loosely coupled HW operation including IP NbC (Network beyond the Chip). IP areas of expertise include common interfaces, data converters, modulators, digital filters, DSP, processors, FSM, and other custom specified functionality.
Professor in Electronics Engineering with a PhD. in VLSI (Universidad Nacional de Mar del Plata). Expertise in digital RTL and physical design. Experience in FPGA RTL and HLS design for heterogeneous computing. Knowledge in sub-threshold analog design. Fiction writer (National Literature Award for Novel, 2011, Costa Rica)
A researcher and VLSI guy
Electronics enginner
My name is "YERRA BHASKARA VARA PRASAD" pursuing B.tech ECE 3rd year in Rajiv Gandhi University of Technologies, Nuzvid, Andhra Pradesh 521201.
Passionate about Digital VLSI and Hardware Accelerators. Experienced in using open-sourced tools for design and verification
Digital System Designer.
An electrical engineering student studying from FAST-NUCES with a vested interest in IC design.
Still a Bachelor student..Trying to get know more always!!
I am a High School Student, Entry Electrical Engineer, and Computer Scientist I love to tinker with stuff and to innovate new ideas.
An enthusiast of the Open Source World.
Hello everybody! I am a FPGA developer in Croatia, I do FPGA project and am starting ASIC design as another careere choice.
I started my passion a year ago, I was supposed to do my radio-ham license but it has been postponed. So in the meantime instead of just waiting I started to learn about signal processing. I bought an SDR, built my antenna a (double cross), then I bought a yagi 70cm - 2m. I also designed my upconverter to be able to get a bunch of different ranges that my SDR would not catch. I'm now building a cubesat Simulator. Using a raspberry pi and an STM32.
I hold a Doctoral Degree in ‘Information and Communication Engineering,’ with 22+ years of experience in engineering education in various capacities. I have more than 30 research articles, presented and published in various National, International Journals and Conferences. My research interests are in the following domains and are not confined to VLSI, AIoT, Intelligent Transportation for Smart Cities in India, FPGA-based System Design, etc. My professional membership includes a Fellow, in the Institution of Engineers (India), a Fellow in the Institute of Electronics and Telecommunication Engineers, a Senior Member of IEEE, and a member of ISTE & ACM.
Osaze Shears is passionate about many engineering and computational concepts. These include embedded systems, application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), and microprocessor technologies. Osaze spends his free time tutoring other students who are interested in learning to become better computer scientists and engineers to benefit the greater society. Osaze is currently a PhD student at Virginia Tech conducting research under the Multifunctional Integrated Circuits and Systems (MICS) lab. His research interests include: • Spiking Neural Networks • Hardware Acceleration • SoC Design with ASICs and FPGAs • Deep Learning • Edge Computing
Starting small and hopefully moving towards big ideas. Interest in FPGAs, HDLs and Open Source Software and Hardware. Several decades of IT business experience.
founder of patho.ai, using latest ai tech to accelerate pathology and drug discovery research using custom HDL HPC computation power of performing insilico simulation and compounds search and discovery.
Víctor Asanza, Ph.D. (EL Oro - Ecuador, 1986). Researcher in fields like Digital Systems Design based on FPGA, Open-Source Processor, Open-Source Hardware, Edge Computing, Artificial Intelligence and Human-Machine Interaction with a major research interest in Brain-Computer Interface. He was graduated as Electronic and Telecommunications Engineering on 2010 (ESPOL, Ecuador). He was graduated as Master in Automation and Industrial Control on 2013 and was graduated as Ph.D. in Applied Computer Science on 2022 (ESPOL, Ecuador). Currently, he collaborates as a Senior Researcher since June 6th, 2019, in the Smart Data Analysis Systems Group (SDAS GROUP). He performs research activities mainly within the framework of the research programs on intelligent embedded systems, open-source RISC-V processor, open-source hardware, FPGA, and Human-Machine Interaction.
I am studying artificial intelligence as my Bachelors at the Institute of Technology Deggendorf. For my further studies I want to specialise in low level chip control and hardware accelerated devices cut out for edge AI devices.
Hi! I'm a senior student at the National University of Sciences and Technolog (NUST), and majoring in Electrical Engineering. My focus is Digital Design and FPGA fabrics.
An aspiring young electrical engineering student from Pakistan trying to learn and build my expertise in the FPGA/SoC development world with Xilinx Zynq platforms. Working on a machine learning accelerator on Digilent Cora Z7 (Zynq 7000 series SoC) board for my senior year project.
Dedicated, innovative and enthusiastic individual with consolidated expertise in Digital Electronics, Data Sciences, Robotics and IoT. A confident leader who effectively collaborates with the team members to accomplish all goals in an accurate and timely manner.
Experienced in software engineering and offensive cybersecurity, I specialize in wireless networking security, cellular communication security, and cryptanalysis. Proficient in C, C++, and Python, I excel in scripting and automation. Currently delving into embedded system design, focusing on FPGA and ASIC.
I am electronics engineer with 30years experience. I have very good expertise in IC packaging.
I work as an consultant through my company Nogito As. I make radio and microwave electronics including antennas and production ready mechanics/enclosures. I also work with embedded system design and enjoy writing code for small microcontrollers - typically used for various tasks like running PLLs, gain control, etc. The last 13 years I have been working with subsea instrumentation and have gained a lot of insight into the world of strange mechanical design for these systems. These are high performance systems with high degree of reliability and uptime.
I graduated with a computer engineering BS/MS from the University of Maryland College park. I now work in industry at a medical device company.
Senior security researcher, compiler/binary hacker, NFC ninja, hardware hacker with a FPGA hammer. Previously Pay Security.
