Cybersecurity nut, hardware hobbyist, nature enthusiast, amateur trumpet player. I also play World of Warcraft with my dad on the weekends.
I received the B.S. degree in Industrial Electronics Engineering from the Universitat Politècnica de Catalunya, Spain, in 2007, and the M.S. degree in Micro- and Nanoelectronics Engineering in 2009 and the Ph.D. degree in Microelectronics and Electronic Systems in 2015 both from the Universitat Autònoma de Barcelona, Spain. From 2006 to 2008, I was with Investigation Total Ware, S.A., Spain, where I was engaged in analog and mixed-signal circuit design for highly reliable wireless telecommunication systems. From 2008 to 2015, I was with the Integrated Circuits and Systems design group at the Institut de Microelectrònica de Barcelona, CNM, CSIC, Spain, designing low-power high-precision mixed-signal ASICs for integrated smart sensors and IP blocks. From 2015 to 2016, I was with Broadcom Ltd., Barcelona, Spain, developing low-power CMOS IPs like low-temperature-drift oscillators, varible-temperature-coefficient current/voltage generators, temperature sensors, cross-domain level shifting and biasing circuits, touch-sensor transmitter drivers. I am co-author of 12 publications and participant in several research and industrial projects using a wide range of CMOS technology nodes. I am recipient of the 2007 Highest Grade Point Average in the Graduating Class Award, the 2014 Best Paper Award and the 2015 Student Best Paper Award Honorable Mention. My skills include: high-performance continuous-time/switched-capacitor circuits such as low-power high-resolution ADCs/DACs using Class-AB OpAmps; system high-level modeling (SciPy/Sage, Matlab); system electrical-level modeling (Verilog/-A/-AMS); EKV circuit-level modeling; full-custom IC design cycle (gEDA Tools/Cadence Virtuoso: from schematics to layout and verification); development of low-noise and low-distortion test equipment (including microcontrollers and FPGAs) and software (using C++, Tcl, VB, Python); and, experimental IC measures and parameter extraction.
I'm VLSI Design Engineer aspirant and like to work on design challenges in VLSI domain. I like to keep updated of cutting-edge technology in my field of interest.
35 years mixed signal SoC, ASIC, and FPGA design and management experience. Concertal provides rapid functional IP integration using proprietary System Design Automation technology that includes delivery of RTOS capable fabric that supports loosely coupled HW operation including IP NbC (Network beyond the Chip). IP areas of expertise include common interfaces, data converters, modulators, digital filters, DSP, processors, FSM, and other custom specified functionality.
A young and ambitious individual, eager to apply my knowledge of Computer Architecture and VLSI Physical Design to develop hardware that is performance, power and area efficient, while actively contributing to the development and growth of the open-source semi-conductor industry
Senior Mechanical Design Engineer with 23 years experience in the design and installation of mechanical systems. Primarily focus is on Commercial High Rise and Institutional HVAC and Domestic Water Systems and associated Controls.
30+ years of experience ranging across telecom, embedded systems, semiconductor, firmware development.
Assistant Professor (IISc) | Ph.D. & S.M. (MIT) | B.Tech. (IIT-KGP)
I am a Master's student who has to know for learning and do experiments as well as for writing technical blogger. My website links are given below to connect with my open-source family of the VLSI champions. https://nishitnathwani.blogspot.com/ https://geniusvlsi.blogspot.com/
Electrical engineer with PhD in micro-electronics, and more than 23 years experience in the automotive industry. Specialized in the development of CAD tools to support mixed-signal and smart-power IC design. Founder of SYDELITY b.v. a start-up company offering services and products accellerating system-level simulations.
student
I have been a Professor in The Dept. of Electronics and Communication, College of Engineering, Guindy (CEG), Anna University, Chennai, India and I have retired last year after being on the faculty of this University for twenty eight years. I continue to teach courses as a Guest Faculty in the same Dept. at CEG, Anna University in the areas of Analog, Mixed Signal, RF and Communication Systems and IC Design. I have supervised student teams in building Small Satellites (Avionics subsystems) and also CMOS IC Designs. I have also supervised Masters and Doctoral thesis in the areas of GPS (baseband), uP Clock PLLs and CDRs, RF LNAs, and resonant sensors.
I am a sophomore BSc student. My major is EEE. I am studying at Bangladesh University of Engineering Technology. I want to use my academic skill to contribute to the fundamental field of particle physics.
I am an entrepreneur by mind. KINCHIT Technologies, aims to develop circular digital technology solutions and services for Industries, governments and global companies that help to solve the root cause problems. Our current economic system is not holistic but devastating and fragile. Resource intensity and population growths of countries are increasingly becoming burden. Therefore there is a need for fundamental and systemic change order, moving away from the current ‘linear’ system to a more pragmatic ‘circular’ model - regenerative and resilient.
Digital System Designer.
Assistant Professor at the Mechanical and Aerospace Engineering Department. The Henry Samueli School of Engineering. University of California, Irvine.
I am the founder of Aurifex Labs LLC. I have a degree in EE and have a strong interest in computer architecture, but have been a software developer/entrepreneur professionally. I also have a little audio DSP background. I created Prospero.Live, a collaborative software development platform.
I am a PhD. Telecommunication Engineer with 25 years of working experience in the industry. I started my career in 1997 as an IC Design Engineer, then I moved to other technical and management roles in the semiconductor and aerospace industries. Since 2017 I am also teaching IC Design at University for MsC. graduate students.
Engineering enthusiast
Post-doctoral research fellow in the discipline of Software and Systems, School of Computer Science and Statistics, Trinity College Dublin, with a keen interest in learning new things, specially related to computer science and engineering. Around 4 years experience of teaching and research and more than 10 years of experience in architecture design, optimization, analysis, implementation and verification of digital and digital signal processing systems on FPGAs and ASICs. Diversifying research career by working on quantization of deep convolution neural networks. Author of three peer reviewed journal publications and five international conference publications.
Electronic Engineer with experience in RF/AMS IC Design and other electronics and telecommunications projects. Served in working groups and also as leader. Has also experience in entrepreneurship. PhD in Microelectronics. Currently Adjunct Professor at Federal University of Semi-Árid Region - UFERSA and Head of LIEB/LAMERF Research Labs where develop R&D projects in the areas of instrumentation, biomedical engineering, RF/MW circuits and microelectronics.
I'm a Senior Researcher at the Barcelona Supercomputing Center and Junior Faculty at Polytechnic University of Catalonia (UPC). I'm the recipient of the RISC-V Educator of the Year Award 2019, for the advanced graduate course Processor Design I'm teaching at UPC, which is focused on the design of high-performance safety-critical systems. I'm the PI of the GPU4S project funded by the European Space Agency (ESA) in which we are investigating the applicability of embedded GPUs in space.
M. Pardo (Senior Member, IEEE) received the B.S. degree in electronics engineering from Universidad del Norte, Barranquilla, Colombia, in 2002, and the M.Sc. and Ph.D. degrees in electrical engineering from the Georgia Institute of Technology, Atlanta, GA, USA, in 2007 and 2012, respectively. He is currently an Electronics and Electrical Engineering Department Graduate Programs Coordinator with Universidad del Norte and leads the electronic analog design area. His research interests include the areas of oscillators, energy harvesters, and renewable energy systems.
I am a current Master's student in IC (Integrated Circuit) and Systems Design, as well as a Research Assistant at the Micro Nanoelectronics (MiNE) Lab located at SEECS NUST. I completed my Bachelor's degree in Electronics Engineering from UET Peshawar. As a member of the MiNE Lab team, I am involved in cutting-edge research in the field of micro and nanoelectronics, with a specific focus on the design and development of integrated circuits and systems. My academic and research background has provided me with a strong foundation in electronics engineering, and I am passionate about utilizing my skills to contribute to the development of innovative technologies in this field.
An aspiring young electrical engineering student from Pakistan trying to learn and build my expertise in the FPGA/SoC development world with Xilinx Zynq platforms. Working on a machine learning accelerator on Digilent Cora Z7 (Zynq 7000 series SoC) board for my senior year project.
Analog-RF IC circuit and system design engineer.
RTL design engineer with experience developing mobile GPUs (Samsung), high-end networking ASICs (Juniper) and CPU cores (MIPS). Co-author of lab manuals and online courses on FPGA design, RTL2GDSII flow and computer architecture. Founder of Verilog Meetup, a Silicon Valley and online community that develops open-source SystemVerilog examples targeting three niches: beginners, students who want to prepare for microarchitectural job interviews and university professors who want to avoid FPGA vendor lock (our examples are interoperable between Xilinx, Altera, Gowin and Lattice and compatible with ASIC flows, such as TinyTapeout and eFabless (in progress)).
I am an Undergrad Student from KNUST, Ghana and I am currently reading electrical and electronics engineering. And I am more interested in how I can incorporate Machine Learning into HDLs.
I am a professional in the field of Chip Design, Primary working on Synthesis, Physical Design, Static Timing Analysis and Physical Verification
B. Tech from IIT Bombay 73 elec and Masters from Philips Holland 75 and working on design and development 1975 till date
Fresh Electronics and Computer Engineering graduate from Nile University with magna cum laude distinction. Interested in computer architecture design using AI. Have an experience with digital IC design, data analysis, machine learning, software engineering, and system administration. Currently, working at the NISC research center in Nile University as a part-time research assistant in the field of microarchitecture design.
I work as an consultant through my company Nogito As. I make radio and microwave electronics including antennas and production ready mechanics/enclosures. I also work with embedded system design and enjoy writing code for small microcontrollers - typically used for various tasks like running PLLs, gain control, etc. The last 13 years I have been working with subsea instrumentation and have gained a lot of insight into the world of strange mechanical design for these systems. These are high performance systems with high degree of reliability and uptime.
My research interests include systematic circuit synthesis techniques, modeling and simulation of linear and nonlinear circuits and systems, design and applications of fractional order chaotic oscillators, multi-objective optimization, evolutionary algorithms, and analog and mixed-signal design automation tools.
Senior security researcher, compiler/binary hacker, NFC ninja, hardware hacker with a FPGA hammer. Previously Pay Security.
