semi retired, small startup for Medical (oncology/treatment) system, analog circuit designer, College Lecturer, Surfer&moto Rider.
I'm an experienced Analog Mixed Signal IC design engineer with 20+ years of experience in Analog IC level design, analog system modeling, layout, and lab testing. Areas of expertise are SerDes, ADC, DAC, PLL, RF , Base Band, Band Gap, Opamps.
BSEE graduating senior with a focus in digital design. I have taken coursework in Analog, Digital, Mixed Signal and RF IC design, and have experience using Cadence's tool suite as well as NI's AWR. I have also done multiple EDA centric courses in validation, formal and functional verification and Digital IC Testing
IC Design Engineer
>10 years of experience in precision analog and sensor interface IC design.
Associate professor at Pontificia Universidad Catolica de Chile, analog and mixed-signal design
Digital designer experienced in high-speed ASICs for optical/copper transceivers, including DSPs, error correction and SoC support.
I am researcher with goals of developing high end technologies for the future.
José T. de Sousa holds a PhD degree from Imperial College London (1998) and has been a university lecturer and researcher at Lisbon University (1999-present). He holds 4 international patents, is co-author of one book, and was General Chair of the Field Programmable Logic and Applications Conference in 2013. Dr. de Sousa has published more than 70 technical papers in international journals and conferences. He was co-founder and CEO of Coreworks, a semiconductor intellectual property company, which he ran from 2001 to 2013. His specialties are digital circuit design, hardware/software architecture, technical team management and semiconductor IP marketing and sales.
Lecturer UiTM
Mixed background in computer science, applied mathematics and electrical engineering. Expert in algorithms to custom core development, system architecture, integration and functional verification.
Electronics Engineer and Researcher with a demonstrated history of working in the higher education industry. Skilled in CAD/EDA tools for ASIC, PCB and FPGA design, scripting and programming. Education professional with a PhD in Electrical Engineering and Computer Science from University of Nis, Faculty of Electronic Engineering Nis, Serbia.
Expert in embedded and mobile applications since 2003. Has many years of experience in software and hardware development, effective team management. Excellent in the research and development, technology findings and implementations.
Principal Engineer at ONiO AS
Self-taught Electronic Engineer with a lot of experience in programming. I consider myself creative, analytical and dynamic, through my studies I have developed the ability to face and lead changes; I am interested and committed to continuous improvement in a globalized world, both professionally and personally. Being able to contribute what I have learned and add value, thus learning from the opportunities in today's working world.
ASIC Developer at Ericsson, trying hands with the open source tool flow.
ASIC architect and designer. Specialize in deep learning, video, image and signal processing, and compression. Professor of Electrical and Computer Engineering at The College of New Jersey.
Electrical engineer with PhD in micro-electronics, and more than 23 years experience in the automotive industry. Specialized in the development of CAD tools to support mixed-signal and smart-power IC design. Founder of SYDELITY b.v. a start-up company offering services and products accellerating system-level simulations.
Roman Gauchi received the M.Sc. in Electrical Engineering from Polytech Grenoble, France in 2017 and the Ph.D. in Electrical Engineering from CEA-LIST, Grenoble, and University of Grenoble Alpes, France in 2021. Dr. Gauchi is a Postdoctoral Research Associate at the University of Utah, since March 2021. His main research interests are emerging technologies and reconfigurable architectures, digital integrated circuit design and embedded software.
Jan Gray is the President of Gray Research LLC, Bellevue, WA, USA. Jan is a software architect and computer architect. Formerly a Partner Software Architect at Microsoft, Jan's developer tools and platforms products include Alice Pascal, Microsoft C/C++ 7.0, Visual C++ 1.0-4.0, Transaction Server 1.0, 2.0, COM+ Services, Common Language Runtime / Microsoft .NET performance engineering, and the MS Parallel Computing Platform (Visual Studio 2010). Blame Jan for .PDB files. Jan is also an expert in computing with FPGAs. He designed the first 32b FPGA RISC SOC (1995), first FPGA RISC multiprocessor (1999), first kilocore RISC-V, and first kilocore RV64I with HBM. Jan has over 60 patents granted in US, Europe, and Asia.
A researcher and VLSI guy
I am VLSI Trainee wanted to design chips
Experienced SW developer (C/C++/C#) and digital HW designer (SoC/FPGA)
PhD student working on a superconducting FPGA design aiming to work on neuromorphic computing in the future.
I would like to think I am a safety-focused, results-driven, and professional Electronics & Communication Engineer and M Tech in Electronics & Communication Engineering with specialization in VLSI Design, who can be relied upon to carry out my tasks competently within strict rules and procedures in a fast and efficient manner.
ECE Undergraduate Student @ Guru Gobind Singh Indraprastha University
Experienced Senior Design Engineer with a demonstrated history of working in the electrical and electronic manufacturing industry. Skilled in DAC, SPICE, ADCs, Electronics Hardware Design, and Management. Strong engineering professional with a M-Tech focused in VLSI System Designs from Vallurupalli Nageswara Rao Vignana Jyothi Institute of Engineering &Technology and also a B-Tech Degree in the field of Electrical, Electronics and Communications Engineering from Mahatma Gandhi Institute of Technology.
I am a microelectronic engineer/CMOS designer with an emphasis on digital & low-power electronics and front-end circuitry. I am an academic at The University of Sydney, Australia and working on devices to data solutions for a range of problems such as unmet needs in electronic monitoring/sensing and interventions in neurological disorders.
William Oswald received the B.S. degree in computer engineering and the M.S. degree in electrical engineering from the University of South Alabama, in 2020 and 2021, respectively. He is currently pursuing the Ph.D. degree in systems engineering. He has worked in industry as a Systems Analyst at Packaging Corporation of America, from 2019 to 2020. His research interests include computer architecture design, machine learning, and model based systems engineering.
Assistant Professor at the Mechanical and Aerospace Engineering Department. The Henry Samueli School of Engineering. University of California, Irvine.
Founder and CEO of Earth ICT, SPC NAICS 334413; Semiconductor and Related Device Manufacturing Incorporation Date: 08/03/2021 Corporation ID: C4773876 1-650-996-7232 art@earthictspc.com Biography: Dauntless Entrepreneurial Risk-taker; Invited expert, ITU-T ICT Sector L.TIME (The IC Metric for Energy-efficiency, Quality-Factor) Recommendation. “Art is many faceted; he creates outside the box; he is a serial entrepreneur-intrapreneur and change agent, and is flexible-adaptable-situational. He has worked for Silicon Valley icons such as SRI, Applicon, Computer Sciences Corporation, Informatics, Atari R&D, Interactive Research Corp., Samsung Information Systems America. And he has participated in several startups: Digital Video Inc. (1985–2001), Ravisent Technologies (1998–1999)” [source: ”Sustainable computing - ACM ]
I am a PhD. Telecommunication Engineer with 25 years of working experience in the industry. I started my career in 1997 as an IC Design Engineer, then I moved to other technical and management roles in the semiconductor and aerospace industries. Since 2017 I am also teaching IC Design at University for MsC. graduate students.
I am an Assistant Professor in the VLSI vertical of Department of ECE at RV College of Engineering, Bengaluru, Karnataka. I am a passionate teacher who teaches various courses in VLSI domain. My research interests are in the areas of Analog and RFIC Design. I got several opportunities at RVCE to implement various personalized teaching methods for the students, facilitated experiential learning, adapted innovative techniques in teaching and learning through flipped classroom and blended learning approaches. I am currently responsible for the curriculum design and development for courses in VLSI domain. I am also responsible for introducing new electives in specific areas. I have a YouTube channel with 300 + videos on the courses taught so far for the benefit of a wider student community.
administrator
D Gracia Nirmala Rani received the B.E. degree in Electronics and Communication Engineering from Syed Ammal Engg College, Madurai, India, in 2004, and M.E. degree in VLSI Design from Karunya University, Coimbatore, India in 2007. She has awarded Ph.D. degree in VLSI Design from Anna University, Chennai India in 2014. She is working as an Associate Professor in Thiagarajar College of Engineering, Madurai since 2007. She teaches courses on system/digital and analog electronic design and VLSI processor architectures. Currently, five research scholars are doing their research under her guidance. She has authored or co-authored 42 international journal and conference papers like IET Circuits, Systems and Devices, Spinger, Wiley and Elsevier Publications. Also she has published 3 Books/Book Chapter in Springer LNCS and CCIS Publications. She has filed 2 Patent in BioMedical Engineering Field. She has guided the B.E students’ project which won the India Cadence Design Contest Award 2017 and 2018 instituted by Cadence Design System Pvt Ltd, Bangalore. In 2018, she was the technical program chair of the 22nd International Symposium on VLSI Design and Test. She is serving as a reviewer in IEEE Transaction on Nanotechnology, Elsevier and Inderscience Journals, respectively. Her research interests include RFIC Design, Physical Design Automation, Optimization Algorithms using Machine learning for IC and mixed signal circuits and systems for Bio-medical Devices.
Graduate Student and Research Assistant at the MM-Wave, THZ and Photonics Lab (MTP), Arizona State University
Technology development in intergrated analog circuits. I'm available to design analog and mixed-signal circuits as an external contractor.
electronic system designer / software and hardware engineer, embeded system expert, signal expert, proccess designer, researcher, Developer of complexity and reversal wantings. Reverse engineer. i addopt my whole life to this science. thank you for presentings of quantum, psych
I am Dr. Naushad Alam working as an Associate Professor in the Department of Electronics Engineering, Z H College of Engineering & Technology, Aligarh Muslim University, Aligarh, India. I received B. Tech. degree in Electronics & Communication Engineering from Jamia Millia Islamia, New Delhi in 2003, and M. Tech. Degree in Electronic Circuits & Systems Design from Aligarh Muslim University, Aligarh in 2009. I earned Ph.D. degree in Microelectronics from Indian Institute of Technology Roorkee, India in 2013. My doctoral work was on nanoscale circuit design considering the impact of process-induced mechanical stress. He has published 29 papers in SCI indexed journals that include 10 IEEE Transactions and 33 papers in reputed conferences. I have supervised two PhD thesis in the area of device-circuit co-design and presently supervising two more PhD students. I have also successfully executed a UGC funded research project on TFET based SRAM cell design for IoT Applications. My research interests include device-circuit co-design, robust nanoscale circuit design, low power circuit design, PVT tolerant circuit design, Near-Threshold/Sub-Threshold circuit design etc.
Zhiyang Ong is a globetrotting, venturesome cultural chameleon tackling challenges related to U.N. Sustainable Development Goals, using a skill set that spans electrical engineering and computer science. He is a Ph.D. student at Texas A&M University's electrical & computer engineering department. He is currently working on noise-based logic and embedded deep learning, and had worked on problems in electronic design automation, VLSI formal verification, satisfiability modulo theories, network science (or complex systems), evolutionary computation, network optimization, and multi-objective optimization. He has also designed multiple VLSI circuits and systems, from SRAMs and processors to a Viterbi decoder and a tree adder. In his free time, he was recently working on solving the Quadratic Travelling Salesman Problem (QTSP) with his research collaborators, using an adiabatic quantum computer from D-Wave Systems.
Mixed-signal designer
Hi, I'm a student at UACJ and I like integrated circuit designs.
I'm a new grad Digital Design engineer working. Looking forward to contribute to open source silicon projects.
An energetic semiconductor professional with varied experience in the field of research, teaching and IC design. 📌 More than 6 years of experience in analog and mixed signal IC design. 📌 3 years of mentoring experience in analog circuit and layout design. 📌 Been part of the 4 complete IC development project. 📌 Inventor and co-inventor of 2 patents (filed) in the field of high-speed data path communication. 📌 Published few research papers with more than 30 engineering citations. 📌 6 month experience as a lead role in standard cell library development in a leading semiconductor organisation. 📌 more than 4 years of teaching experience in under-graduate electronics engineering courses.
Provides mixed-signal CMOS training to academia using open-source tools and also solution for the consumer and automotive industry.
Hello I'm sultan, and I'm from KLE technological University hubli and I'm very exited to do this course on picorisc.
President and CEO
Analogue Circuit Designer
We are group of experienced engineers working in Front-End Digital Logic Design.
Dad. Partner. Scientist. Activist. Maker. — He/His
Electrical engineer with interests in ASIC design, biomedical imaging, and scientific instrumentation.
Hello everybody! I am a FPGA developer in Croatia, I do FPGA project and am starting ASIC design as another careere choice.
Infrism Digital is a UK based competent digital marketing agency providing clients with their expert services in order to grow business and improve its presence on google. We also help our clients establish their social media presence by producing quality content. We make sure that our efforts are directed towards improving the client’s brand image in the market.
Working on a PhD in electronics and nanofabrication at the University of Glasgow. Interested in designing CPUs and SoCs with RISC-V.
I am a professor at Federal University of Juiz de Fora (UFJF). I'm interested on analog and mixed-signal integrated circuits, as well as analog and digital electronics and microprocessors.
Gentlemen: I have a professional background in the automotive industry, working in production management, IT and logistics where I worked as a technician, supervisor, coordinator and manager, which allowed me the following experiences: 15 years in the automotive industry, managing production and industrial logistics, planning, scheduling and production control in serial and batch production lines. With experience in dimensioning, planning and implantation of a manufacturing unit with productive start and logistics transfer without production losses. 20 years in IT management, in a soft house in the implementation, parameterization and maintenance of ERP Management projects (programming, database and systems analysis), maintenance and specification of electrical equipment, materials and systems. 4 years ago I started working with maintenance of electronics, commercial, industrial equipment , hospital, motors and transformers. Study and implementation of projects in the electrical discipline for overhead and underground networks, electrical infrastructures in residential, commercial, industrial works and maintenance of equipment in the electronics laboratory. Research and development of Brain-Machine Interfaces. As a form of relaxation and leisure, I developed an aptitude for fine arts where I have worked as a draftsman, painter, sculptor and modeler for over 20 years. I have mastery of Project Management methodology, knowledge in several SAP systems, in addition to Advanced Office package
A bit of everything - mostly focused on networking system level designs / FPGA / Switch Fabric from concept to validation - and now automotive
Enthusiastic VLSI Design Engineer currently working in Domain Specific Architectures
I am an enthusiastic proponent of open source hardware. See my position paper on the topic: https://ieeexplore.ieee.org/document/7945172.
Designer specialized on VLSI radiation tolerant architectures and circuits
I've done everything from silicon design at the "bottom of the stack" to System Architecture and Design (with plenty of SW to go with it; at every level)
I'm the CEO of a fabless semiconductor start-up company and have more than 15 years experience in designing mixed-signal ASICs on various foundry processes.
Hi I'm a MASc Student at University of Toronto. My research focuses are FPGA architecture, DL Acceleration, Heterogenous devices and CAD tools.
Research scientist working in a MOS technology support for teaching at academic institutions.
As an experienced Electronic Engineer with a solid foundation in FPGA design, embedded systems, and IoT, I specialize in high-level hardware programming and real-time signal processing. With expertise in RTL, RISC-V, Verilog, SystemVerilog, and VHDL, I bring a robust understanding of digital design to my work. My professional background includes over a decade in the PCBA assembly industry, where I programmed and configured SPI and Chip Mounter machines, managed production processes, and handled CAD and Gerber files for precision assembly. Additionally, I am well-versed in designing and testing complex circuits using tools like Proteus, Fritzing, and Altium, with a particular interest in the emerging role of AI in electronics. As a career coordinator, former educator in electronics, and an active researcher, I blend practical industry experience with a passion for fostering innovation and teaching in the electronics field. My recent projects involve integrating IoT with embedded solutions, exploring the intersection of FPGA technology with real-time applications, and continually expanding my knowledge in artificial intelligence.
Known since I was 12 years old that I wanted to be an electrical engineer, by the time I was like 14 or 16 years I knew that I specifically wanted to design microprocessors. I officially became an electrical engineer by graduating with a B.S.E.E. along with a minor in Business from N.C. State University. With more than 30 years of industry experience, I look forward to bringing some of my own original ideas and visions into reality and I am very much tapped in the entrepreneurial spirit while also be an advocate for Open Source projects, both Software and hardware based, along with being a super advocate for the Agile movement for all engineering disciplines, i.e. beyond it just being a thing software folks do!
Jack of all trades
Analog and Mixed signal IC designer
Leader of a quantum hardware engineering team. Quantum hardware engineer, IBM quantum administrator/ developer, carpenter from the countryside in northern Arizona.
Analog-RF IC circuit and system design engineer.
I am a science enthusiast. I have knowledge of analog and digital electronics
RTL design engineer with experience developing mobile GPUs (Samsung), high-end networking ASICs (Juniper) and CPU cores (MIPS). Co-author of lab manuals and online courses on FPGA design, RTL2GDSII flow and computer architecture. Founder of Verilog Meetup, a Silicon Valley and online community that develops open-source SystemVerilog examples targeting three niches: beginners, students who want to prepare for microarchitectural job interviews and university professors who want to avoid FPGA vendor lock (our examples are interoperable between Xilinx, Altera, Gowin and Lattice and compatible with ASIC flows, such as TinyTapeout and eFabless (in progress)).
Hi. I am a junior at the University of Notre Dame majoring in computer engineering. I am passionate about the intersection between storytelling and technology. I enjoy the challenges that come with debugging code as well as learning from the experiences of other women in STEM. Besides frequenting Stack Overflow in attempts to make my errors magically disappear, I like to play volleyball, practice Irish Dance, watch the Yankees, wear Chuck Taylors, explain to my friends that the bagels from Jersey are better than the bagels from their home state, and spend time outside with my sister.
To obtain a challenging position as a VLSI Engineer in a reputable organization where I can utilize my skills and knowledge to contribute to the growth of the organization while also enhancing my own personal and professional development.
Hugo Hernández received his B.S. degree in Electronic Engineering from The Industrial University of Santander, Colombia in 2005 and M.S. degree in Electrical Engineering from Polytechnic School of the University of São Paulo (EPUSP), Brazil in 2008. Hugo obtained his Ph.D degree in Electrical Engineering from University of São Paulo in 2015. Hugo is an Analog/Mixed‐signal design engineer with strong background in IC design techniques, industry experience on ASICs for sensoring applications and hands on experience in 28nm, 55nm, 65nm, 130nm, 180nm and 0.35um CMOS process nodes. Research interests include Low power Data Converters, SAR ADCs, DACs, PLLs and Low power analog design.
CSE Professor at the University of Notre Dame
I'm an Electronics Professor at the University of Tlemcen
I am a Computer Engineer at the University of Notre Dame, with minors in Innovation and Entrepreneurship and Corporate Engineering Practices. I enjoy working with assembly languages and at the circuit level.
ASIC Designer with experience in Back-end & Front-end stages for ASIC design flow.
B. Tech from IIT Bombay 73 elec and Masters from Philips Holland 75 and working on design and development 1975 till date
From Mining Gems in the field to mining data about gems and developing bleeding edge Gemological/Geological/Geophysical/Geochemical/Geospatial/Spectroscopic and other Survey, Testing, Measuring, Databasing, Retrieval, and Analytical Devices/Software/Tradecraft as well as beyond crystal unit level precision automated faceting/cutting/polishing/cabbing/carving/lapidary instruments and even 500 picometer diameter diamond polish... I do it all. Anyone in the industry wanting to spice up and drastically increase the efficiency and ROI on their wafer lapping/polishing capabilities: help me...help you...get ahead of the EUV/DUV/3nm and finer processes (my system has an RI value of less than 500pm... THAT is smaller than 8 carbon atoms in a cubic formation...carbon...not silicon...
Embedded Software designer
Senior lecturer at Vasyl Stefanyk Precarpatian National University
Adjunct Professor and Chief Mentor, Advanced VLSI Lab Silicon University, Bhubaneswar, India
I am a highly skilled and motivated Integrated Circuit (IC) Designer with expertise in both schematic and layout design and verification. Throughout my career, I have played a key role in the development of multiple image sensor Readout Integrated Circuits (ROICs), from initial concept to final production. My key strengths include: • Schematic Design and Verification: I have extensive experience in designing and verifying top-level schematics and novel digital IP blocks for ROICs. I am proficient in using Verilog-A, PWL models, and SPICE netlists for comprehensive validation. • Layout Design and Verification: I possess a strong understanding of physical design principles and a proven track record of owning physical design for complex ROICs, including floor planning, top-level integration, and signoff. I have expertise in 3D IC integration and have developed reusable block-level layouts for various digital and analog IPs. • Design Enablement: I am passionate about creating efficient design flows. I have pioneered an open-source digital design flow and a TSV routing flow, established methodologies for 3D IC validation, and customized Calibre rules for advanced designs. I am a results-oriented individual with a keen eye for detail and a passion for innovation. I am proficient in various EDA tools and PDKs and possess excellent problem-solving and analytical skills. I am eager to contribute my expertise to a team that is developing cutting-edge imaging technologies
As a VLSI enthusiast, I completed a 6-month internship as a NAND product engineer at Micron Technology where my work comprises of post-silicon validation, data analysis using JMP, and testing NAND components under varying PVT conditions in DDR3 and LPDDR4. I'm passionate about CMOS and have experience simulating NAND output drivers through HSPICE simulations in collaboration with the design team. Additionally, I have proficiency in System Verilog, RTL design, and a solid grasp of digital IC, analog IC, and physical design. I hold a master's degree in Microelectronics from BITS Hyderabad and a bachelor's degree in ECE from Gayatri Vidya Parishad. I achieved a GATE ECE score of 571 with an All India Rank (AIR) of 1404 in 2023. devadeepreddi20@gmail.com
