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"profiles" search for "area_of_expertise": RTL

Number of Results: 910

Krzysztof Herman

Academic teacher at the University of the Bio Bio, Chile

Karthik Mahendra

Hi! It's good to see you being here, good to believe we have same interests. Coffee Design Debug Improve OpenSource

Dhruv Mehta

Interested in digital design development

Zeeshan Rafique

Researcher at Micro Electronics Research Lab -UIT | RISC-V Ambassador

Arsenii Terekhov

Radio Signal Processing Enthusiast

Bhawandeep Singh

Linkedin - https://www.linkedin.com/in/bhawandeep-singh-1b164517/ PhD student in CSE department in UCSC, advised by Prof. Jose Renau. My areas of majors are CPU design, digital design and embedded software.

Ahsan Ali

Passionate Electrical Engineer with interest in computer architecture and SoCs.

Shahbaaz Lokhandwala

An independent and self-motivated fpga engineer with many product and service based project in semiconductor and cryptography market. More than three years of experience in the crypto mining market. Involved in product design/development, management.

Michael Tomlinson

Skills

Digital VLSI

Area of Expertise

Digital: RTL

Jorge Scandaliaris

Teacher/researcher at the Electronics Department (DEEC) of Universidad Nacional de Tucumán, Argentina

Klas Nordmark

Digital designer and embedded software developer. Experience from telecom and computer vision.

Syed Arsalan Jawed

I have been working on Analog/Mixed-Signal Integrated Circuits design since last 16 years. I graduated from NED UET, Karachi in 2001 and then worked with Avaz Networks, a Silicon-Valley Company on RTL design and verification of a high-density Line Echo Cancellation Engine for a couple of years. Joined Linkoping University, Sweden in 2003 for Masters in SOC, which concluded with a Masters Thesis on Sigma-Delta Modulators with Fraunhofer Institute of Integrated Circuits, Germany in 2005. The same year I joined University of Trento and Fondazione Bruno Kessler, Trento, Italy for my PhD on Readout Interface Design for MEMS Capacitive Microphones. Worked with ST-Microelectronics, Milano and Analog-Devices, Copenhagen as a Guest PhD Student. This Phd results in 20+ publications and 2 patents with 3 successful MEMS Readout ASICs.

tung

Skills

Verilog

Area of Expertise

Digital: RTL

Hector Lopez

Electrical Engineer for over +30 years designing hardware and software development.

Haitham

Skills

synopsys

Area of Expertise

Digital: RTL

Rama Kotapally

I have 20 years of experience in Circuit Design, Physical Design, RTL.

Sun

Engineer, who typically worked in start up environment. So do A-Z, a-z and 1 - infinity if something has to work

Dave Cox

Hardware Design Enthusiast

Skills

C/C++ Verilog

Area of Expertise

Digital-RTL

Marcus N

System and database administrator, embedded systems hobbyist.

Tomasz Hemperek

Skills

Verilog

Area of Expertise

Digital-RTL

Anton Paquin

EE student. ++ Neuromorphic circuits

Gary Huang

Circuit design hobbyist

Skills

C/C++ Verilog

Area of Expertise

Digital: RTL

Ankit K V

Electronics Freak !

Area of Expertise

Digital-RTL

Abdelkrim Bessaad

I am an Analog/mixed signal IC designer. I worked with different technologies like ams035, xh035 and st 130nm.

Shriniket Sawant

Recent college graduate from San Jose State University with Masters in Electrical Engineering degree. Specialization - Digital Design and Verification.

Mustafa BALCI

Skills

C/C++

Area of Expertise

Digital-RTL

jmgil

Skills

C/C++

Area of Expertise

Digital-RTL

Emre Kırkaya

PhD candidate on digital electronics

Area of Expertise

Digital-RTL

Mustafa Tosun

I am a digital design/verification engineer. I have 2 years of full-time industry experience. In total, I have 4.5 years of experience in RTL design, Electronic Design Automation and Verification using VHDL/Verilog, Perl, Tcl and Linux. I was the #1 graduate of Bahcesehir University in Mechatronics Engineering in 2013

Vishwajeet S B

I'm VLSI Design Engineer aspirant and like to work on design challenges in VLSI domain. I like to keep updated of cutting-edge technology in my field of interest.

Hardik Manocha

Intern with Synopsys VIP Group, Working on HDMI VIP Development

Deepak Siddharth Parthipan

I am Digital/SoC Design and Verification enthusiast.

Doug Miller

Skills

C/C++

Area of Expertise

Digital-RTL

Mario Vigliar

Mad about OSS system design, specialized in video compression and image processing, CNN and dedicated HPC architectures. New deals in low power design

Rajat Bansal

A student pursuing B.Tech in Electronics and Communication branch.

Area of Expertise

Digital-RTL

Julio

RTL Engineer

Area of Expertise

Digital: RTL

George Duffy

Area of Expertise

Digital: RTL

KARIM

ASIC Designer

Area of Expertise

Digital: RTL

Mikhail

Skills

Verilog

Area of Expertise

Digital: RTL

Ernesto Conde

Electrical engineer with over 7 years of experience in the semiconductor industry. Working experience in Analog IC Design, Silicon/FPGA Lab bring-up and testing, FPGA Prototyping/Emulation & ASIC/SoC Design,

gaogui

aaa

Skills

Verilog

Area of Expertise

Digital: RTL

Mahmoud Youssuf Ahmad

Graduate student of ECE department Ain Shams University, and Currently Master Student of ECE department Cairo University with major of Electronics design.

piyush gaur

i am currently persuing mtech from in vlsi design from DTU india.

Area of Expertise

Digital: RTL

Federico Paredes

Digital designer experienced in high-speed ASICs for optical/copper transceivers, including DSPs, error correction and SoC support.

Mohammed Essam Abd El Samee Soliman

I works as junior physical design engineer and I have passion in VLSI field specially in digital IC design. I have experience in writing RTL, test benches and in PnR flow.

Paulo Roberto Bueno de Carvalho

Paulo Roberto B. de Carvalho is a Hardware and Digital IC Design Engineer with 6-years experience in microelectronic area in Digital IC Design, with specialization in RTL design optimization for area and power reduction, Verification and Physical Implementation flow. He has 10-years experience in Application Engineering, technical consultant and semiconductors manufacture processes. He received his bachelor degree in materials, processes and electronic components technology at Faculdade de Tecnologia de Sao Paulo (FATEC-SP) in 2006. In 2011, he joined the Brazillian Federal Government IC Brazil Program of the Ministry of Science, Technology and Innovation (MCTI), trained in Digital Systems Design area. He received his Master of Science degree in Electric Engineering with specialization in Microelectronic area on Integrated Systems Laboratory at Electrical Engineering Department of Polytechnic School of University of Sao Paulo in 2016.

Bob Ledzius

35 years mixed signal SoC, ASIC, and FPGA design and management experience. Concertal provides rapid functional IP integration using proprietary System Design Automation technology that includes delivery of RTOS capable fabric that supports loosely coupled HW operation including IP NbC (Network beyond the Chip). IP areas of expertise include common interfaces, data converters, modulators, digital filters, DSP, processors, FSM, and other custom specified functionality.

Akram Selim

Skills

Verilog VHDL

Area of Expertise

Digital: RTL

ardencaple

Semiconductor professional with 40 years experience. I act as a technical consultant, design consultant, or architect for SoCs, embedded systems etc.

J. Rodriguez

Mixed background in computer science, applied mathematics and electrical engineering. Expert in algorithms to custom core development, system architecture, integration and functional verification.

Vishal Prafulkumar Katigar

Trained in ASIC verification from Maven silicon Bengaluru Also having experience in embedded domain (PCB layout design)

Guy Hutchison

ASIC Designer and entrepreneur

Marco Merlin

Electronics Engineer with 10 years experience in microelectronics and research. Familiar with CMOS integrated circuits design, wireless communication systems, programming and lab environment, I am comfortable working for worldwide semiconductors firms. Passionate for high-tech and music, advocate for teamwork and collective intelligence to support a strong problem-solving methodology, I am curious, self-motivated, addicted to learning and re-shaping the new technologies I am exposed to. During my workday I aspire to address "real-life problems", hopefully continuing to develop my multi-disciplinary skills as a means for technical and personal enrichment.

Dejan Mirkovic

Electronics Engineer and Researcher with a demonstrated history of working in the higher education industry. Skilled in CAD/EDA tools for ASIC, PCB and FPGA design, scripting and programming. Education professional with a PhD in Electrical Engineering and Computer Science from University of Nis, Faculty of Electronic Engineering Nis, Serbia.

TK Chua

Skills

Verilog

Area of Expertise

Digital: RTL

Tim Whitfield

Skills

Verilog

Area of Expertise

Digital: RTL

Alfonso Chacon-Rodriguez

Professor in Electronics Engineering with a PhD. in VLSI (Universidad Nacional de Mar del Plata). Expertise in digital RTL and physical design. Experience in FPGA RTL and HLS design for heterogeneous computing. Knowledge in sub-threshold analog design. Fiction writer (National Literature Award for Novel, 2011, Costa Rica)

Komal Javed

A young and ambitious individual, eager to apply my knowledge of Computer Architecture and VLSI Physical Design to develop hardware that is performance, power and area efficient, while actively contributing to the development and growth of the open-source semi-conductor industry

Alexey Shabalovskiy

Expert in embedded and mobile applications since 2003. Has many years of experience in software and hardware development, effective team management. Excellent in the research and development, technology findings and implementations.

Shyam K

Skills

Verilog VHDL

Area of Expertise

Digital: RTL

Shilpa Prabhu

VLSI Design Engineer

Netsanet gebeyehu

Analog/RF/Digital design manager

Eduardo Augusto da Costa

Eduardo is an Electrical Engineer engaged in hardware development with a true passion for developing and enhancing applications. While at university, he worked in a variety of projects, from VHDL in a SOC project, to a PCB for a power circuit, and even web interfaces for electronic devices network connected. He allies his technical background with great communication skills. He is used to and is passionate about working in diverse cultural environment as was his period as an international student in Japan. He also got a certification in in Digital Integrated Circuit Design and Project Flow with Cadence tools (IC Brazil Program). Currently he works at HT Micron, and is interested in positions related to chip design, hardware design, embedded software development and similar areas.

Vachan U Bharadwaj

A recent graduate student from Syracuse University major in Electrical Engineering with focus in VLSI Designs

Bill Flynn

Area of Expertise

Digital: RTL

Devdatt Haldipur

Skills

Tanner L-Edit

Area of Expertise

Digital: RTL

Shahbaz Abbasi

Design engineer with combined R&D and industrial experience in developing analog/mixed signal ICs for applications including inductive position sensors and imager readouts. Proven abilities with widely used blocks including (but not limited to) filter, amplifier, ADC, DAC, voltage regulators, bandgap reference, ring/LC oscillator, comparator and custom digital logic circuitry. Experience with full tape-out flow including schematic design, analog/mixed-signal simulations, floor planning, layout, system-level verification and chip measurements. Strong familiarity with industry standard tools and instruments used for design, verification and testing such as Cadence, Synopsys, Mentor Graphics, and Keysight. Frontend digital hardware design (ASIC/FPGA) experience using Verilog HDL. Considerable exposure to ASIC backend flow (synthesis and PnR) using Synopsys Design Compiler and Cadence Innovus. Skilled with programming platforms such as MATLAB, C++, C#, Perl, UNIX Shell and VB. Strong education with Ph.D. and MSc. degrees in Electronics Engineering along with several peer-reviewed articles in IEEE journals.

Arun Jeevaraj

ASIC Developer at Ericsson, trying hands with the open source tool flow.

Area of Expertise

Digital: RTL

Daniel Limbrick

I am currently an Associate Professor in the Electrical and Computer Engineering Department at North Carolina Agricultural and Technical State University (NC A&T). As director of the Automated Design for Emerging Process Technologies (ADEPT) laboratory at NC A&T, I research the following questions: (1) how can we make computers more reliable in harsh environments (i.e., ionizing particles, malicious fault injection) and (2) how can we extend Moore’s law (e.g., 3D IC)? To answer these questions, he interrogates the traditional abstraction layers of integrated circuit design (i.e., functional description, circuit design, physical design) to discover design methodologies that are more relevant to these goals.

Larry Pearlstein

ASIC architect and designer. Specialize in deep learning, video, image and signal processing, and compression. Professor of Electrical and Computer Engineering at The College of New Jersey.

Gian Torres

Skills

C/C++ Python VHDL

Area of Expertise

Digital: RTL

SHIVDEEP _

Research Scholar | Analog Circuits | EMI Immune Amplifiers | Neuromorphic Circuits

Alperen Bolat

I am research asistant at TOBB Economy and Technology University

Area of Expertise

Digital: RTL

Pu Wang

I'm an engineer with both software and hardware background. I'm building next generation distributed storage system.

Nishit Nathwani

I am a Master's student who has to know for learning and do experiments as well as for writing technical blogger. My website links are given below to connect with my open-source family of the VLSI champions. https://nishitnathwani.blogspot.com/ https://geniusvlsi.blogspot.com/

Sang-Deok Park

I am interested in the platform-based complete SoC design/verification automation methodology and framework

Syed Azhar Ali Zaidi

I am an Assistant Professor in Electronics Dept. UET Taxila, Pakistan. I did my PhD from VLSI Lab Politecnico di Torino, Italy. My research interests are digital hardware implementation of Communication and DSP algorithms.

Jarrett Malone

Area of Expertise

Digital: RTL

Yogotie

Skills

VHDL

Area of Expertise

Digital: RTL

Stephan Nolting

Skills

VHDL

Area of Expertise

Digital: RTL

Priyanka Dutta

current Phd Student in UCSC Hardware System Collective group formerly worked in Qualcomm Wireless R&D team as a design verification engineer

Roman Gauchi

Roman Gauchi received the M.Sc. in Electrical Engineering from Polytech Grenoble, France in 2017 and the Ph.D. in Electrical Engineering from CEA-LIST, Grenoble, and University of Grenoble Alpes, France in 2021. Dr. Gauchi is a Postdoctoral Research Associate at the University of Utah, since March 2021. His main research interests are emerging technologies and reconfigurable architectures, digital integrated circuit design and embedded software.

Opensource FoodRev Projects

Collaborative development of open source technologies for public health.

Skills

C/C++ Verilog

Area of Expertise

Digital: RTL

Jose Fernando Picó Antolí

I love electronic systems. I am interested to learn all about electronic systems.

Skills

Verilog

Area of Expertise

Academic: Student Digital: RTL

Jung Jaemin

Skills

Verilog VHDL

Area of Expertise

Digital: RTL

Christo van Tubbergh

Graduate engineer with FPGA and Analog design experience

Lachlan Munday

Skills

C/C++ Verilog

Area of Expertise

Digital: RTL

Ioannis Savidis

I am an Associate Professor teaching VLSI design, hardware security, and digital circuit design at Drexel University. My research interests include analysis, modeling, and design methodologies for high performance digital and mixed-signal integrated circuits, power management for SoC and microprocessor circuits, hardware security, including digital and analog obfuscation and Trojan detection, and electric and thermal modeling and characterization, signal and power integrity, and power and clock delivery for heterogeneous 2-D and 3-D circuits.

Qirui Da

爱瞎搞的技术党

KASHIF INAYAT

Kashif Inayat currently working as a doctorate fellow researcher at System-on-Chips (SoC) Laboratory, Electronics Engineering Department of Incheon National University, South Korea. He considers himself fortunate to have the opportunity to work under Prof. Jaeyong Chung at Incheon National University. Prior to starting his Ph.D., he completed his Master of Science in Electronics and Computer Engineering (ECE) from graduate school, Hongik University in 2019 under the supervision of Prof. Seong Oun Hwang. Moreover, during MS studies he worked at Information Security and Machine Learning Lab, Hongik University, South Korea as a graduate researcher for 2.5 years. Furthermore, he chaired the special sessions at International Conference on Green and Human Information Technology (ICGHIT 2019), held in Kuala Lumpur, Malaysia (Jan, 16-18, 2019). Moreover, he is a registered member of the Pakistan Engineering Council and a reviewer for the IEEE Access Journal.

Bob smith

Skills

Verilog

Area of Expertise

Digital: RTL

BOYANG ZHANG

Chip Architect

Abdelrahman Rabeh

Digital design engineer Msc Student at cairo university Faculty of Engineering

Mohammad A. Nili

Skills

C/C++ Verilog

Area of Expertise

Digital: RTL

Kranthi Kumar Pamarthi

I am passionate about all areas of VLSI Design and trying my level best to be an expert in the entire flow, analog, digital and mixed signal. Beyond chips, I like poetry, skating, skydiving, late night swimming and trekking in no particular order.

Brendan Ford

I am a fourth year Electrical engineering student interested in design and verification of digital and analog integrated circuits. - I have experience doing layout for RFIC using SOI processes where I gained extensive knowledge in device physics, floorplanning, ESD protection techniques, and techniques to mitigate manufacturing limitations -I have extensive experience using Cadence Virtuoso layout XL , running verification simulations using Cadence ADE Explorer, EMX, and PEX.

Raghavendra P R

Skills

Python Verilog

Area of Expertise

Digital: RTL

Phanindra Sharma

FE Design

Area of Expertise

Digital: RTL

Viraj Rawal

Skills

Verilog

Area of Expertise

Digital: RTL

Pulidindi Rakesh

Iam an Under-graduate currently pursuing B.Tech 3rd year in Electronics and Communication Engineering at Rajiv Gandhi University of Knowledge and Technologies, campus in Nuzvid, Andhra Pradesh 521201

Tarush Singh

I am a VLSI enthusiast looking for an opportunity to make my career as a Design engineer in the Hardware Industry.

Bharathi M

working as Assistant Professor in Sree Vidyanikethan engineering college, Tirupati.

Daryl Kowalski

Broad background in ASIC's with expertise spanning networking, high speed compute and digital signal processing. Expertise across all areas of development from verification to tape-out.

Saurabh Singh

Skills

Verilog

Area of Expertise

Digital: RTL

Luigi Zaffarana

Skills

Verilog VHDL

Area of Expertise

Digital: RTL

YERRA BHASKARA VARA PRASAD

My name is "YERRA BHASKARA VARA PRASAD" pursuing B.tech ECE 3rd year in Rajiv Gandhi University of Technologies, Nuzvid, Andhra Pradesh 521201.

Chaganti Harsha Vardhan Reddy

I'm Harsha,I'm pursuing my undergraduate in the domain of Electronics and Communication Engineering from SRM University AP.

Area of Expertise

Digital: RTL

Alperen Koyun

Beginner Digital Designer

Area of Expertise

Digital: RTL

veena S Chakravarthi

SoC Architect.Technologist. Hands-on experience in complex low power SoC designs, from concept to production. Excellent track record in successful development and production of ASICs, Technologies: Bluetooth, WLAN, IoT, Gigabit Ethernet, EPON networks, Interface ICs, Broadcast TV and Communication controllers. Demonstrated consistent track record of first-pass silicon success. PhD in Low power VLSI. Recipient of US and Indian patents. Core Competency: Chip Architecture, Micro Architecture, logic design, RTL Verilog coding, Chip level verification, Static Timing analysis, Formal Verification, design rule checking, AXI, AHB and APB bus protocols, Digital ASIC methodology, DFT methodology, Low Power ASIC design, Interfacing with backend teams, Timing closure, Post silicon bring up and validation, Project Planning, Scheduling and Management, FPGA Prototyping. Author of Book "A Practical Approach to VLSI System on Chip (SoC) Design" published by Springer Nature. Domain experience: Communications, EPON, WLAN, Bluetooth, IoT, Healthcare, Nextgen TV, Automotive. Managed dynamic, cross cultural teams of size 40 to 100. Standards worked on IEEE802.3, IEEE802.11b, ac, ad. ATSE 3.0, Automotive ethernet, Bluetooth Quality standards: ISO 9002, ISO 13485, IEC 60601-2 Funded Research: Derivative Low power standard cell library development PhD Guidance: 2 one in Asynchronous VLSI design methodology and second in Sub 1V power supply for complex SoCs. Co-founded healthcare company:Sensesemi Technologies Pvt. Ltd. Academic research head and taught engineering students for their undergrad, Post grad and PhD courses Chair, IEEE NanoTechnology Council, Bangalore Section as a founder Chairperson, Current Senior IEEE member.

Marc C.

Area of Expertise

Digital: RTL

DavidDong

Skills

C/C++

Area of Expertise

Digital: RTL

Justin Coughlin

Skills

Fpga

Area of Expertise

Digital: RTL

Rohit Khanna

Hardware Design Engineer with 7 years of experience in RTL/SoC/FPGA Design, Integration, and Verification. Proficient in Front End Design tools and methodologies. Passionate about IC Design/Fabrication, AI, and IoT prototyping.

J Dhurga Devi

My area of interest is Analog and Mixed signal circuit design. I teach Electronic Circuit, VLSI design and Signals & Systems for under graduate students and Analog Integrated Circuit Design, Data Converters and Clock & power management circuit courses for Masters students. I also teach VLSI lab courses for both both undergraduate and masters students. Every year I supervise both undergraduate and masters students in analog circuit design projects. Presently I am involved in SRC project as Co-task leader in Analog and Mixed Signal circuit verification project using Machine learning techniques.

Zong-Ru Li

2nd year MS student in ECE, looking for joining an ASIC project.

Travis Ayres

Skills

Verilog

Area of Expertise

Digital-RTL

Rana Shahid Ali

Master's research student in IC design has hands-on experience on Cadence tools like Virtuoso, Genus, Innovus, Calibre. Motivated to learn more in the field of IC design

Bharath Shashidhar

Skills

Verilog

Area of Expertise

Digital: RTL

Ran Chen

I`m a digital IC designer working for a RISC-V company RIVAI in China, which has close ties with RIOS Lab.

Area of Expertise

Digital: RTL

Bin

Skills

Verilog

Area of Expertise

Digital: RTL

Shruti Prakash Gupta

I am a Senior Undergraduate in Electrical Engineering Department at IIT Gandhinagar, India. VLSI Design and the ability to tweak at the hardware level interest me a lot!

KONKALA SOURABH

Enthusiastic, Innovative, Technically Aspiring & Constantly motivated

Kavin Raj Dennis

VLSI Professional with 2.3 years of experience and adequate knowledge in RTL Design, UPF, SDC, Lint, CDC, Synthesis, Physical Design, STA and Scripting. I love Computers and I am interested in RISC V

Aki Van Ness

abyssal witch | deranged catgirl hardware/software engineer + vtuber | that crazy SCSI girl | she/her

Pier Francesco Maria Santi

I'm a Senior Electronic Engineer passionate with ASIC & FPGA

Omid Kavehei

I am a microelectronic engineer/CMOS designer with an emphasis on digital & low-power electronics and front-end circuitry. I am an academic at The University of Sydney, Australia and working on devices to data solutions for a range of problems such as unmet needs in electronic monitoring/sensing and interventions in neurological disorders.

Gabriel Cojocaru

Skills

Verilog

Area of Expertise

Digital: RTL

Rajkumar Kubendran

Assistant Professor. ECE. University of Pittsburgh. Interests: Neuromorphic and Biomedical Systems Design

Supratim Das

Professional ASIC engineer @NVIDIA | Tinkerbell | Electronics DIY Enthusiast

Kees van Nieuwburg

Skills

C/C++

Area of Expertise

Digital: RTL

sayeekumar swaminathan

I am avid designer of microcoded based processor circuits .

NIPUN PRABHAKAR DHANDAGE

I am a student in my final year of B.tech in electronics. I am eager to learn about vlsi and its technology. I want to take part in openMPW program

Meet Sangani

Skills

Verilog

Area of Expertise

Digital: RTL

Anastasios Psarras

Digital Hardware Design Engineer & Enthusiast, PhD, ECE

RECEP GÜNAY

Received B.S. degree from Electrical and Electronics Engineering in Middle East Technical University, Turkey, in 2019. Currently, pursuing M.S. degree from Electronics Engineering in Bogazici University, Turkey. Research interests are computer architecture, hardware security and secure memory architecture

Guilherme Guioco

13+yr ASIC Digital Designer. Master degree on Microeletronic Sensors. Worked on NXP through different projects on automotive and consumer/general market MCUs on areas from SoC Integration to Timing Sign-Off

Gurkirat Singh

Semiconductor professional with 12+ year experience in ASIC hardware design and methodology development. Main expertise is in chip STA signoff - top level, IO timing, High speed design timing, and good knowledge of RTL design, Physical design (Layout, CTS, Route, DRCs), Synthesis and Formal Verification. Have also completed business management studies and looking for interesting opportunities in chip product development and management.

Burak Aykenar

Digital Design Engineer in Yongatek in Ankara/Turkey

Area of Expertise

Digital: RTL

Hunter Laux

Skills

C/C++

Area of Expertise

Digital: RTL

Derek Hines-Mohrman

Graduate Student at the University of Washington.

Muhammad Tahir

Professor at the Department of Electrical Engineering

Victor Muñoz

Skills

Python

Area of Expertise

Digital: RTL

Steve Goldsmith

I am the founder of Aurifex Labs LLC. I have a degree in EE and have a strong interest in computer architecture, but have been a software developer/entrepreneur professionally. I also have a little audio DSP background. I created Prospero.Live, a collaborative software development platform.

Steve Goldsmith

I am the founder of Aurifex Labs LLC. I have a BSEE from Wilkes University. I've spent most of my time in software, education, and entrepreneurship, but have spent the past year learning VLSI and am excited for this new era of open source hardware/tools.

从波 时

Skills

Verilog

Area of Expertise

Digital: RTL

snalvc

Senior software engineer in Tron Future Tech. My work is related to CPU/FPGA heterogeneous computing for radar signal processing. Capable of designing RTL IP, implementing Linux kernel driver and system software programming.

Bankn8II©$A

I waiting for my Blå (E.A.) & untill this no ©omment

Area of Expertise

Digital: RTL

Benjamin Yeffeth

Computer Engineering Student and hardware design enthusiast. Enjoys programming and soldering.

Yihai Zhang

Skills

Verilog

Area of Expertise

Digital: RTL

志远 刘

Skills

Verilog

Area of Expertise

Digital: RTL

Subhojit Basu

Electronics Engineer. Design Embedded Systems , Firmware professionally and fiddle with others :)

ALAN GREEN

Area of Expertise

Digital: RTL

Ozixe

Skills

Verilog

Area of Expertise

Digital: RTL

Ignacio Herrera

I am a PhD. Telecommunication Engineer with 25 years of working experience in the industry. I started my career in 1997 as an IC Design Engineer, then I moved to other technical and management roles in the semiconductor and aerospace industries. Since 2017 I am also teaching IC Design at University for MsC. graduate students.

Y.Goutham Datta

BZZZZZZ

Area of Expertise

Digital: RTL

Abdul Wadood

Final year student of Electrical Engineering at UET Lahore. Area of expertise is Digital Design, Computer Architecture and SOCs.

Efi Sasson

Skills

Verilog

Area of Expertise

Digital: RTL

Md Sakib Hasan

Assistant Professor in the Department of Electrical and Computer Engineering at The University of Mississippi

Surendra Anubolu

Skills

Verilog

Area of Expertise

Digital: RTL

Prof Alexsandro Bonatto

Professor at IFRS Campus Restinga

Nathan S

Engineer at Science Corporation in Alameda, CA

Federico Corradi

I am an Assistant Professor in the Electrical Engineering Department. My research activities are in Neuromorphic Computing and Engineering and span from the development of efficient models of computation to novel microelectronic architectures, with CMOS and emerging technologies, for both efficient deep learning and brain-inspired algorithms. My long-term research goal is to understand the principles of computation in natural neural systems and apply those for the development of a new generation of energy-efficient sensing and computing technologies. My research outputs find use in several application domains as robotics, machine vision, temporal signal processing, and biomedical signal analysis.

Hon-Piu Lam

Hon-Piu Lam, is a Ph.D. candidate in the Department of Electronic and Computer Engineering of the Hong Kong University of Science and Technology (HKUST). He was an analog IC designer engineer in Valence Semiconductor from 2004 to 2007. From 2007 to 2015, he joined Fujitsu Semiconductor focusing on the embedded NOR flash design. He has been a researcher in HKUST focusing on the integrated power electronic and data converter. His research interests include readout electronics, integrated power electronics and radiation hardened electronics for experimental physics.

GABRIEL PIMENTEL GOMES

Undergrad Student. Electrical Engineering at UFMG - Brazil

Aravind Raj Swaminathan

A graduating IC design student with lots of passion and interest for electronics design!

Muhammad Dawood Asghar

MS Electrical Engineering Fellow with a focus on Integrated Circuits and Systems Design. Skilled in Cadence (Virtuoso, Innovus and Genus)

Liban Hussein

Graduate student passionate about integrated circuit design for biomedical applications

Nizar Bo

CTO at Smartware Pte Ltd

Dr D Gracia Nirmala Rani , Associate Professor, Thiagarajar College of Engineering

D Gracia Nirmala Rani received the B.E. degree in Electronics and Communication Engineering from Syed Ammal Engg College, Madurai, India, in 2004, and M.E. degree in VLSI Design from Karunya University, Coimbatore, India in 2007. She has awarded Ph.D. degree in VLSI Design from Anna University, Chennai India in 2014. She is working as an Associate Professor in Thiagarajar College of Engineering, Madurai since 2007. She teaches courses on system/digital and analog electronic design and VLSI processor architectures. Currently, five research scholars are doing their research under her guidance. She has authored or co-authored 42 international journal and conference papers like IET Circuits, Systems and Devices, Spinger, Wiley and Elsevier Publications. Also she has published 3 Books/Book Chapter in Springer LNCS and CCIS Publications. She has filed 2 Patent in BioMedical Engineering Field. She has guided the B.E students’ project which won the India Cadence Design Contest Award 2017 and 2018 instituted by Cadence Design System Pvt Ltd, Bangalore. In 2018, she was the technical program chair of the 22nd International Symposium on VLSI Design and Test. She is serving as a reviewer in IEEE Transaction on Nanotechnology, Elsevier and Inderscience Journals, respectively. Her research interests include RFIC Design, Physical Design Automation, Optimization Algorithms using Machine learning for IC and mixed signal circuits and systems for Bio-medical Devices.

AKASH PRADHAN

Electrical Engineer, Enthusiastic in semiconductor field.

Ashesh Pangma

I am a MSc. Electronic engineering graduate interested in VLSI design.

Usama Liaqat

Trying never to sit back and enjoy but to come forward and prove myself

Talha Bin Azmat

I am en Electronics Engineer currently Pursuing my Masters in IC design from FAST NUCES Islamabad.

Usama Liaqat

Trying never to sit back and enjoy but to come forward and prove myself.

Syed Asad Alam

Post-doctoral research fellow in the discipline of Software and Systems, School of Computer Science and Statistics, Trinity College Dublin, with a keen interest in learning new things, specially related to computer science and engineering. Around 4 years experience of teaching and research and more than 10 years of experience in architecture design, optimization, analysis, implementation and verification of digital and digital signal processing systems on FPGAs and ASICs. Diversifying research career by working on quantization of deep convolution neural networks. Author of three peer reviewed journal publications and five international conference publications.

Govindu Sathvik Reddy

micro-architecture enthusiast | student at IIT Indore

Ali Sabir

I have done electronic engineering from University of Engineering and Technology Peshawar in 2021, currently, i am doing MS in Electrical Engineering (Specialization in IC Design) from National University of Computer and Emerging Science(FAST-NUCES).

Rikkie

Skills

C/C++

Area of Expertise

Digital: RTL

Zhiyang Ong

Zhiyang Ong is a globetrotting, venturesome cultural chameleon tackling challenges related to U.N. Sustainable Development Goals, using a skill set that spans electrical engineering and computer science. He is a Ph.D. student at Texas A&M University's electrical & computer engineering department. He is currently working on noise-based logic and embedded deep learning, and had worked on problems in electronic design automation, VLSI formal verification, satisfiability modulo theories, network science (or complex systems), evolutionary computation, network optimization, and multi-objective optimization. He has also designed multiple VLSI circuits and systems, from SRAMs and processors to a Viterbi decoder and a tree adder. In his free time, he was recently working on solving the Quadratic Travelling Salesman Problem (QTSP) with his research collaborators, using an adiabatic quantum computer from D-Wave Systems.

Pavan Devarasetti

I'm a new grad Digital Design engineer working. Looking forward to contribute to open source silicon projects.

李瑞誠

Skills

Verilog

Area of Expertise

Digital: RTL

Klaus Strohmayer

Independent Digital Design and Verification Expert with more than 20+ years of experience and founder of semify. While working for established semiconductor companies like Infineon, Dialog Semiconductor and NXP I was responsible for bringing ideas into working ASICs. I developed USound’s first ASIC from FPGA based prototyping to tapeout with minimal resourcing, demanding timeline and tight area and power consumption constraints. Currently I'm acting as a consultant for easyIC and Cypress / Infineon. In addition I'm is also lecturer at the FH Joanneum Graz and guest lecturer at the Technical University Graz.

Anton Babushkin

Skills

Verilog

Area of Expertise

Digital: RTL

Chris Gkiokas

Skills

VHDL

Area of Expertise

Digital: RTL

Shivam Potdar

RISC-V Enthusiast GSoC 2020 @ FOSSi Foundation RA @ CAD Lab, IISc Bengaluru, India EE Senior @ NITK Mangalore, India

Matt Venn

Electronic engineer and science communicator.

Skills

Verilog

Area of Expertise

Digital: RTL

VLSI Adi

Skills

Verilog

Area of Expertise

Digital: RTL

Vamshidhar Reddy

I am passionate VLSI trainee looking to explore my skills and build few projects which enhance my coding and debugging skills.

Brenda Gatusch

Skills

C/C++ Verilog VHDL

Area of Expertise

Digital: RTL

Geethanand N

Ex intel professional with over 5 years of experience in front end Vlsi

Aliaa Fouli

Digital Logic Designer

Area of Expertise

Digital: RTL

venkatesh godavarthi

IP, SOC RTL Design engineer, Microarchitecture. Knowledge of Front End

Area of Expertise

Digital: RTL

CHDL Custom High-Speed Digital Logic

We are group of experienced engineers working in Front-End Digital Logic Design.

Manish Mahajan

I am a design / verification Engineer for ASIC and FPGA .

Shubham Tonde

I am recently completed my post-graduation in VLSI and Embedded system from coep pune(India). I like to work in a backend design of VLSI.

Pratika Tripathi

I am Pratika Tripathi. I am in my final year of Btech. I am very interested in physical designing of IC. I had even taken 3 courses of kunal ghosh sir on physical design, stay, and cts. I am doing my final year project in physical design.

Samet GÜZEL

Skills

Verilog VHDL

Area of Expertise

Digital: RTL

Aravind Raj Swaminathan

A fresh graduate interested in chip designing, learning new things everyday!

Area of Expertise

Digital: RTL

Anurag Darbari

SubIP and SoC Design Verification Engineer. Extends to running Full Chip Emulation on Palladium and Protium Platforms.

nitin.patil

Skills

Verilog

Area of Expertise

Digital: RTL

Zain Rizwan Khan

Research Associate at Micro Electronics Research Lab (MERL) working as a hardware design engineer.

Steven Herbst

I'm a PhD student working to make mixed-signal chip design more accessible, drawing inspiration from software development techniques. Prior to starting the PhD program, I spent a number of years working in industry at both the chip- and PCB-level on optical sensors and power systems.

Yiyu Zhu

Skills

C/C++

Area of Expertise

Digital: RTL

Micro Electronics Research LAB (MERL)

I am currently working as a Research Associate. We are doing research and development on RISC-V Technology.

Dan Rodrigues

Skills

Verilog

Area of Expertise

Digital: RTL

Gaurav Kumar K

PhD Student, School of Electrical and Computer Engineering, Purdue University, USA. Research interests include Mixed Signal Circuits, High Speed Circuits and Digital System Design

Joel Sanchez Moreno

My name is Joel Sanchez Moreno I graduated as a Computer engineer and I currently work as a full time RTL design engineer for a start up. In addition, I am doing a part-time master on High Performance Computing on the Universitat Politècnica de Catalunya (UPC)

Harrison Pham

Skills

Verilog

Area of Expertise

Digital: RTL

Anthony Kung

Hi, I'm an Electrical & Computer Engineering + Computer Science student at Oregon State University.

Leonidas Kosmidis

I'm a Senior Researcher at the Barcelona Supercomputing Center and Junior Faculty at Polytechnic University of Catalonia (UPC). I'm the recipient of the RISC-V Educator of the Year Award 2019, for the advanced graduate course Processor Design I'm teaching at UPC, which is focused on the design of high-performance safety-critical systems. I'm the PI of the GPU4S project funded by the European Space Agency (ESA) in which we are investigating the applicability of embedded GPUs in space.

Manar Abdelatty

Skills

Verilog

Area of Expertise

Digital: RTL

Kaya Demir

I am a researcher on random number generators

Furkan Sahin

Senior FPGA Design Engineer

Sathyanarayanan

I am accomplished digital design engineer having 8 years of industrial expertise . I am currently working on IP design and IP integrations stuffs .

Anton Blanchard

Skills

C/C++ VHDL

Area of Expertise

Digital: RTL

Vineel Jessy Talluri

Analog Design and Layout engineer, had knowledge and hands-on in RTL Design

Bhagesh Choudhry Maheshwari

ASIC/FPGA Design Engineer | Former Intern in CERN | Former Cultural Ambassador of Pakistan in USA | Gold Medalist

Skills

Matlab

Area of Expertise

Digital: RTL

Lakshana Ramalingam

Skills

Verilog

Area of Expertise

Digital: RTL

Yunus Dawji

I am a PhD candidate with analog and digital design experience.

Pradeep C

I hold a Doctoral Degree in ‘Information and Communication Engineering,’ with 22+ years of experience in engineering education in various capacities. I have more than 30 research articles, presented and published in various National, International Journals and Conferences. My research interests are in the following domains and are not confined to VLSI, AIoT, Intelligent Transportation for Smart Cities in India, FPGA-based System Design, etc. My professional membership includes a Fellow, in the Institution of Engineers (India), a Fellow in the Institute of Electronics and Telecommunication Engineers, a Senior Member of IEEE, and a member of ISTE & ACM.

Tayyeb Mahmood

Computer architect, SoC designer, Electrical Engineer

Osaze Shears

Osaze Shears is passionate about many engineering and computational concepts. These include embedded systems, application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), and microprocessor technologies. Osaze spends his free time tutoring other students who are interested in learning to become better computer scientists and engineers to benefit the greater society. Osaze is currently a PhD student at Virginia Tech conducting research under the Multifunctional Integrated Circuits and Systems (MICS) lab. His research interests include: • Spiking Neural Networks • Hardware Acceleration • SoC Design with ASICs and FPGAs • Deep Learning • Edge Computing

Gagan Gupta

I am an enthusiastic proponent of open source hardware. See my position paper on the topic: https://ieeexplore.ieee.org/document/7945172.

ADROITEC SYSTEMS PVT LTD

Adroitec Systems is design Services Company for the VLSI and Embedded Software. Founded in 2017, Adroitec Systems is having Register Office at Visakhapatnam with branch offices in Bangalore. Adroitec Systems delivers cutting edge solutions across a diverse portfolio of services including Physical Design, Physical Verification, and Design Verification. With about 50 highly qualified employees.

Jair Garcia Lamont

Designer specialized on VLSI radiation tolerant architectures and circuits

S Skandha Deepsita

Chip-design enthusiast, passionate to innovate. PhD Scholar @IIITDMKancheepuram

giuseppe maugeri

Skills

C/C++

Area of Expertise

Digital: RTL

Terrence Anthony Hussey

I've done everything from silicon design at the "bottom of the stack" to System Architecture and Design (with plenty of SW to go with it; at every level)

Dhruva Hegde

Masters Student (Integrated Circuits and Systems) at IIT Bombay.

Zain Siddavatam

A Computer Architecture Enthusiast, Undergrad Student

sanjay kamat

I am a senior ASIC and IP development person. My strength is in building high performance ASIC teams that deliver high quality ASIC and IP products .

帅 郭

Skills

C/C++ Perl Verilog

Area of Expertise

Digital: RTL

Abdulrahman Alaql

Hardware Developer

saltyJeff

Skills

C/C++

Area of Expertise

Digital: RTL

Aisha Khan

I am a current Master's student in IC (Integrated Circuit) and Systems Design, as well as a Research Assistant at the Micro Nanoelectronics (MiNE) Lab located at SEECS NUST. I completed my Bachelor's degree in Electronics Engineering from UET Peshawar. As a member of the MiNE Lab team, I am involved in cutting-edge research in the field of micro and nanoelectronics, with a specific focus on the design and development of integrated circuits and systems. My academic and research background has provided me with a strong foundation in electronics engineering, and I am passionate about utilizing my skills to contribute to the development of innovative technologies in this field.

Herbert T

Area of Expertise

Digital: RTL

MengCheng

Skills

C/C++ Verilog

Area of Expertise

Digital: RTL

Muhammet Enes Yanık

Undergraduate student at Gebze Technical University, Turkiye. Works on custom instructions on Risc-v cores and Risc-v arthitechture.

Hassan Raza

I'm Design Verification Engineer working on RISCV processors.

宏立 郑

Skills

Verilog

Area of Expertise

Digital: RTL

ye yang

Skills

Verilog

Area of Expertise

Digital: RTL

James Meech

Skills

Python

Area of Expertise

Digital: RTL

Phillip Stanley-Marbell

Skills

C/C++

Area of Expertise

Digital: RTL

Jani Silvander

Hobbyist

Area of Expertise

Digital: RTL

Muhammad Ali Farooq

Hi! I'm a senior student at the National University of Sciences and Technolog (NUST), and majoring in Electrical Engineering. My focus is Digital Design and FPGA fabrics.

Changil Son

Developing the High Performance Computing SoC

Adrian Yap

Area of Expertise

Digital: RTL

Mohammed E. Elbtity

PhD Candidate at the University of South Carolina

Jean-Sébastien Staelens

Technology enthusiast, passionate by innovative cutting edge projects

Xi Zhang

Skills

C/C++

Area of Expertise

Digital: RTL

Obaidullah Ahmed

An aspiring young electrical engineering student from Pakistan trying to learn and build my expertise in the FPGA/SoC development world with Xilinx Zynq platforms. Working on a machine learning accelerator on Digilent Cora Z7 (Zynq 7000 series SoC) board for my senior year project.

Berna Ors Yalcin

Berna Örs Yalçın received the Electronics & Communication Engineering degree and the MSc degree in 1995 and 1998, respectively, both from the Istanbul Technical University (ITU), Turkey. She received the Electrical Engineering degree in applied sciences from the Katholieke Universiteit Leuven, Belgium, in 2005. Currently, she is a Professor at ITU. Her main research interests include cryptography, embedded systems, and side-channel attacks.

harvin iriawan

Skills

C/C++ Verilog

Area of Expertise

Digital: RTL

Usama ishfaq

Hello, my name is Usama Ishfaq. I am an electronics engineer with expertise in IC design. With years of experience in the industry, I have developed a strong understanding of the complexities involved in designing and developing integrated circuits. My passion for electronics and technology has driven me to constantly learn and innovate, ensuring that I stay up-to-date with the latest advancements in the field. I take pride in my ability to work collaboratively with teams and clients to deliver high-quality solutions that meet their specific needs. Thank you for taking the time to read my introduction.

JAIKISHORE G

FPGA Design Engineer

Skills

Python Verilog

Area of Expertise

Digital: RTL Digital: Synthesis

guanyan Lye

Skills

Verilog

Area of Expertise

Digital: RTL

xiang lu

Skills

Verilog

Area of Expertise

Digital: RTL

Mark Zakharov

Area of Expertise

Digital: RTL

ömer faruk sert

Skills

Verilog VHDL

Area of Expertise

Digital: RTL

Mohd Rizwan

I am very dedicated to learn new things.

Area of Expertise

Digital: RTL

wzcuifan

Skills

Verilog

Area of Expertise

Digital: RTL

Yuri Panchul

RTL design engineer with experience developing mobile GPUs (Samsung), high-end networking ASICs (Juniper) and CPU cores (MIPS). Co-author of lab manuals and online courses on FPGA design, RTL2GDSII flow and computer architecture. Founder of Verilog Meetup, a Silicon Valley and online community that develops open-source SystemVerilog examples targeting three niches: beginners, students who want to prepare for microarchitectural job interviews and university professors who want to avoid FPGA vendor lock (our examples are interoperable between Xilinx, Altera, Gowin and Lattice and compatible with ASIC flows, such as TinyTapeout and eFabless (in progress)).

Daniel Turgel

Skills

Python

Area of Expertise

Digital: RTL

Maciej Gabryelski

I am working as embedded software developer.

Skills

C/C++ Verilog VHDL

Area of Expertise

Digital: RTL

Klavs Rommedahl

Graduated as electronic engineer in '93. Think it could be nice and fun to try out this part of the electronic life/world :). I have worked a lot with digital designs over the years, everything from small LED controllers to larger computer boards. And then I am a PCB geek.

Francisca Donoso

Skills

C/C++

Area of Expertise

Digital: RTL

Sai Srinivas TNS

VLSI DOMAIN SKILLS --------------------------- • Digital Electronics • HDL: Verilog • HVL: System Verilog • TB Methodology: UVM • Protocols: APB, UART, I2C, SPI • EDA Tools: Modelsim, Quartus Prime, Questasim. VLSI RTL SKILLS ---------------------- • Digital Skills : Combinational and Sequential circuits • FSM • Memories • Verilog : Data types • Operators • BA and NBA • Delays in Verilog • Begin-end and fork-join Blocks • System tasks and Function • Compiler directive • FSM Coding. VLSI VERIFICATION SKILLS ------------------------------------ • System Verilog HVL: Data Types • Memories • Interface • OOPS • Constraint Randomization • Threads • Functional coverage • CRCDV • SV Testbench (Hands on SV Testbench) • Universal Verification Methodology: UVM Objects and Components • UVM Factory • UVM Phases • UVM Configuration • TLM • Virtual Sequence and Sequencer • UVM Testbench (Hands on UVM Testbench).

Remigiusz Rutkowski

Analog guy in digital business

Alejandro Pasciaroni

I am ASIC digital designer engineer, always keen to explore new alternatives, methodologies, designs. I like challenges and always proactive to help.

Facundo G Aguirre

M.S. Computer Engineer, Cybersecurity, IoT Consultant.

Yasin Yılmaz

Electronic Design Engineer

Skills

C/C++ Python

Area of Expertise

Digital: RTL Digital: Synthesis

ANDREA FASOLINO

I am a PhD researcher in Electronic Engeneering at the University of Salerno, Fisciano, Italy. My main interest is the digital design of low power HW architectures for efficient signal processing acceleration.

Kanagaraju Ponnusamy

Seasoned VLSI professional with experience in complete chip design flow, domain experience data communication and telecom.

Evan Day

Computer Engineer at the University of Notre Dame

Shrikrishna K

MSECE student at Ohio State University with focus on Analog & Mixed Signal VLSI circuits

SAMRAT CHHABRA

Enthusiastic electronics engineer passionate about the digital VLSI domain.

muhammad gamal rizq metwally

Fresh Electronics and Computer Engineering graduate from Nile University with magna cum laude distinction. Interested in computer architecture design using AI. Have an experience with digital IC design, data analysis, machine learning, software engineering, and system administration. Currently, working at the NISC research center in Nile University as a part-time research assistant in the field of microarchitecture design.

kerr_wang

Skills

Verilog

Area of Expertise

Digital: RTL

Pallavi Kar

I have recently completed a course in VLSI Design and Verification. During my training period, I have done two projects: Router Design and Verification and the second one is UART Protocol.

Jeyaseelan Kirubaharan

I am software engineer of 20+ years experience in board bring up of multiple SoCs in Linux / QNX/RTOS/Baremetal. Mostly done projects on automotive and industrial automation domains

zhongqi liang

have no money, but love to play.

zmxx

Area of Expertise

Digital: RTL

Monib Ahmed

Skills

Verilog

Area of Expertise

Digital: RTL

Tamilarasan RAJA

Master's Student in Embedded Systems

Pisati Raghavendra Reddy

Masters Student at National Institute of Technology, Karnataka

Hao-Yen Tang

Hao-Yen Tang received his PhD degree from UC Berkeley Advised by Prof. Bernhard E. Boser, his PhD research, PMUT ultrasonic fingerprint sensor, convince InvenSense senior management to make a heavy investment to take this technology to mass market. At InvenSense he’s leading a multi-disciplinary system team for the next generation ultrasonic fingerprint sensor bringup, characterization and calibration, coordinating the works from different field including acoustic, MEMS, CMOS, FW, and SW. Currently, he serves as CTO/Co-Founder in the startup company UltraSense Systems. The company is aiming to transform any surface material into a Touch/Press user interface with it’s proprietary PiezoMEMS-CMOS technology. Dr. Tang is the recipient of 2016 ISSCC Best Paper Award (Lewis Winner Award for Outstanding Paper), 2015 SSCS Pre-Doctoral Award and 2015 ADI Outstanding Student Designer Award. Currently he holds 20+ granted patents, 20+ publications, and 2000+ citations.

Muhammad Usama Zubair

I am an alumnus of Masters in Electrical Engineering from Department of Electrical Engineering, University of Engineering and Technology, Lahore; the project should be shipped there. The address is: University of Engineering and Technology, Main Campus, G. T. Road, Lahore, Pakistan. Postal code: 39161

Berna Ors Yalcin

Berna Örs received the Electronics & Communication Engineering degree and the MSc degree in 1995 and 1998, respectively, both from the Istanbul Technical University (ITU), Turkey. She received the Electrical Engineering degree in applied sciences from the Katholieke Universiteit Leuven, Belgium, in 2005. Currently, she is a Professor at ITU. Her main research interests include cryptography, embedded systems, and side-channel attacks.

Josh Gillespie

Currently employed as FPGA engineer, seeking to learn more about silicon design

Patricio Bulic

I am a professor in computer engineering at the Faculty of Computer and Information Science, University of Ljubljana, Slovenia. My research interests include computer architecture and organization, parallel processing, computer arithmetic, embedded systems, and VLSI design.

Aniket Gupta

currently pursuing masters in VLSI for IIT Bombay.

Renaldas Zioma

Learning to build brain-inspired Neuromorphic chips. I used to wrestle with GPUs for graphics and AI. Previously at Unity Technologies and Electronic Arts.

Vaibbhav T

The SoC architecture, design and verification engineer

Mrunmayee

I am a recent graduate with a Major in Electronics and Telecommunication Engineering and a minor in computer engineering.

Viswa Prapurna Ramireddy

I am a highly skilled and motivated Integrated Circuit (IC) Designer with expertise in both schematic and layout design and verification. Throughout my career, I have played a key role in the development of multiple image sensor Readout Integrated Circuits (ROICs), from initial concept to final production. My key strengths include: • Schematic Design and Verification: I have extensive experience in designing and verifying top-level schematics and novel digital IP blocks for ROICs. I am proficient in using Verilog-A, PWL models, and SPICE netlists for comprehensive validation. • Layout Design and Verification: I possess a strong understanding of physical design principles and a proven track record of owning physical design for complex ROICs, including floor planning, top-level integration, and signoff. I have expertise in 3D IC integration and have developed reusable block-level layouts for various digital and analog IPs. • Design Enablement: I am passionate about creating efficient design flows. I have pioneered an open-source digital design flow and a TSV routing flow, established methodologies for 3D IC validation, and customized Calibre rules for advanced designs. I am a results-oriented individual with a keen eye for detail and a passion for innovation. I am proficient in various EDA tools and PDKs and possess excellent problem-solving and analytical skills. I am eager to contribute my expertise to a team that is developing cutting-edge imaging technologies

lizhaojie

Skills

Verilog

Area of Expertise

Digital: RTL

Chris Feilbach

Currently a Senior CPU Architect at NVIDIA. Here for personal projects only.

Skills

C/C++ Verilog

Area of Expertise

Circuits: Memory Digital: RTL

Shahjahan Sangrasi

I am a final year Computer engineering student at Habib University. I am currently focused on in-depth study of RISCV architecture, and SoC design for Robots.

Frederik Lange

Skills

VHDL

Area of Expertise

Digital: RTL

Jack Dempsey

Cornell Tech ECE Master of Engineering Grad '24. Interested in startups and easier access to chip design and manufacturing!

Vinay

I have around 15 years of experience in Digital Design both in FPGA's and ASIC.

Terry Little

Skills

Perl

Area of Expertise

Digital: RTL

Devang Sharma

Greetings! I, Devang Sharma am a B.Tech final year student studying at Jaypee Institute, Noida. I am a VLSI-enthusiast and posses moderate to advanced-level skillset(at B.Tech level). I have studied about ASIC Design Flow and learnt several HDLs(Verilog, SV, UVM).

Minsang Yu

Area of Expertise

Digital: RTL

sky prime

Skills

Python

Area of Expertise

Digital: RTL

Ahmad Houraniah

Skills

Verilog

Area of Expertise

Digital: RTL

PRIYA K

research scholar

Skills

Verilog

Area of Expertise

Digital: RTL

Monish Subramani

Pre-Final year at EEE, NITK. Looking to get hands dirty with an immense curiosity and interest in fields (and not limited to) Digital Design, CPU architecture and other fields under computer engineering. Crazy about new market innovations and always looking forward to new connections.